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[Qemu-devel] [PATCH v2 10/10] target-arm: Give the FPSCR rounding modes
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v2 10/10] target-arm: Give the FPSCR rounding modes names |
Date: |
Mon, 30 Dec 2013 16:34:35 +0000 |
From: Alexander Graf <address@hidden>
When setting rounding modes we currently just hardcode the numeric values
for rounding modes in a big switch statement.
With AArch64 support coming, we will need to refer to these rounding modes
at different places throughout the code though, so let's better give them
names so we don't get confused by accident.
Signed-off-by: Alexander Graf <address@hidden>
[WN: Commit message tweak, use names from ARM ARM.]
Signed-off-by: Will Newton <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target-arm/cpu.h | 9 +++++++++
target-arm/helper.c | 8 ++++----
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 6c84e22..1a32907 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -487,6 +487,15 @@ static inline void vfp_set_fpcr(CPUARMState *env, uint32_t
val)
vfp_set_fpscr(env, new_fpscr);
}
+enum arm_fprounding {
+ FPROUNDING_TIEEVEN,
+ FPROUNDING_POSINF,
+ FPROUNDING_NEGINF,
+ FPROUNDING_ZERO,
+ FPROUNDING_TIEAWAY,
+ FPROUNDING_ODD
+};
+
enum arm_cpu_mode {
ARM_CPU_MODE_USR = 0x10,
ARM_CPU_MODE_FIQ = 0x11,
diff --git a/target-arm/helper.c b/target-arm/helper.c
index d1ed6b0..b157c55 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -3815,16 +3815,16 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t
val)
if (changed & (3 << 22)) {
i = (val >> 22) & 3;
switch (i) {
- case 0:
+ case FPROUNDING_TIEEVEN:
i = float_round_nearest_even;
break;
- case 1:
+ case FPROUNDING_POSINF:
i = float_round_up;
break;
- case 2:
+ case FPROUNDING_NEGINF:
i = float_round_down;
break;
- case 3:
+ case FPROUNDING_ZERO:
i = float_round_to_zero;
break;
}
--
1.8.5
- [Qemu-devel] [PATCH v2 00/10] A64 decoder patchset 5: most floating point, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 10/10] target-arm: Give the FPSCR rounding modes names,
Peter Maydell <=
- [Qemu-devel] [PATCH v2 06/10] target-arm: A64: Add fmov (scalar, immediate) instruction, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 08/10] target-arm: A64: Add support for floating point conditional compare, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 02/10] target-arm: A64: Fix vector register access on bigendian hosts, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 04/10] target-arm: A64: Add "Floating-point data-processing (2 source)" insns, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 07/10] target-arm: A64: Add support for floating point compare, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 09/10] target-arm: A64: Add support for floating point cond select, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 03/10] target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum, Peter Maydell, 2013/12/30