Re: [Qemu-devel] [PATCH v2] qdev: Keep global allocation counter per bus

[Peter Crosthwaite]

On Wed, Jan 8, 2014 at 6:13 PM, Markus Armbruster <address@hidden> wrote:
>
> Peter Crosthwaite <address@hidden> writes:
>
> > On Wed, Jan 8, 2014 at 2:59 AM, Paolo Bonzini <address@hidden> wrote:
> >> Il 07/01/2014 16:12, Markus Armbruster ha scritto:
> >>>     aarch64     akita           info qtree crashes
> >>>     aarch64     borzoi          info qtree crashes
> >>>     aarch64     spitz           info qtree crashes
> >>>     aarch64     terrier         info qtree crashes
> >>>     aarch64     tosa            info qtree crashes
> >>>     arm         akita           info qtree crashes
> >>>     arm         borzoi          info qtree crashes
> >>>     arm         spitz           info qtree crashes
> >>>     arm         terrier         info qtree crashes
> >>>     arm         tosa            info qtree crashes
> >>>     cris        axis-dev88      info qtree crashes
> >>
> >> The crash is because of commit 7426aa7 (nand: Don't inherit from Sysbus,
> >> 2013-06-18).   Should probably be reverted.
> >>
> >
> > Prefer not, under no reasonable definition is NAND a sysbus device.
> > Whats the real problem here? What is TYPE_SYS_BUS_DEVICE doing WRT to
> > qtree that TYPE_DEVICE is not?
>
> Maybe, but our definition of sysbus has never been reasonable :)
>

FWIW my def "is a device with at least one memory mapped io region,
optionally with interrupts".

> Qdev, as designed by Paul Brook, assumed the parent of a qdev is always
> a qbus and vice versa.  With the exception of the root, which has no
> parent, and is a sysbus, commonly the only one.
>
> A PCI qdev plugs into a PCI qbus, an USB qdev plugs into an USB qbus,
> and so forth.  Any qdev that doesn't really plug into a bus was made a
> "sysbus device" by fiat.  "Sysbus" is a catchall, no more.  In
> particular, it's not a bus in the hardware sense.
>

Can we catch-all, and in qdev itself parent any orphans to the root
sysbus? If so is this init or realize stage?

>
> This "everything plugs into exactly one bus" assumption is of course a
> gross oversimplification, and we've been working on overcoming it for
> quite some time.  It has become possible to define qdevs that aren't
> connected to a qbus.  A TYPE_DEVICE isn't.
>
> That's progress.  But progress isn't justification for not fixing crash
> bugs in monitor commands.
>
> Either you fix "info qtree" to cope with your change to the device
> graph, or the change needs to be reverted until somebody fixes it or it
> goes away.
>

Yes, I'm looking for a real answer here. Just getting my head around
the problem at this minute. Thanks for the write up.

Perhaps, long term the solution is to BUSify the NAND BUS itself:

{
.name = TYPE_ONFI_BUS
.parent = TYPE_BUS
}

{
.name = TYPE_ONFI
.parent = TYPE_DEVICE
}

Regards,
Peter