[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 5/9] pc: PIIX DSDT: exclude CPU/PCI hotplug & GP
From: |
Michael S. Tsirkin |
Subject: |
Re: [Qemu-devel] [PATCH 5/9] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources |
Date: |
Wed, 8 Jan 2014 19:00:55 +0200 |
On Sat, Dec 28, 2013 at 11:30:48PM +0100, Igor Mammedov wrote:
> .. so that they might not be used by PCI devices.
>
> Note:
> Resort to concatenating templates with preprocessor help,
> because 1.0b spec isn't supporting ConcatenateResTemplate,
> as result Windows XP fails to execute PCI0._CRS method if
> ConcatenateResTemplate() is used.
>
> Signed-off-by: Igor Mammedov <address@hidden>
Interesting. Could be worth getting rid of ConcatenateResTemplate in other
places
too so XP works on more systems ...
> ---
> Follow up patch will expose them as motherboard resources
> ---
> hw/i386/acpi-dsdt-pci-crs.dsl | 8 +-------
> hw/i386/acpi-dsdt.dsl | 29 +++++++++++++++++++++++++++++
> hw/i386/q35-acpi-dsdt.dsl | 8 ++++++++
> 3 files changed, 38 insertions(+), 7 deletions(-)
>
> diff --git a/hw/i386/acpi-dsdt-pci-crs.dsl b/hw/i386/acpi-dsdt-pci-crs.dsl
> index b375a19..8b631d1 100644
> --- a/hw/i386/acpi-dsdt-pci-crs.dsl
> +++ b/hw/i386/acpi-dsdt-pci-crs.dsl
> @@ -37,13 +37,7 @@ Scope(\_SB.PCI0) {
> 0x0000, // Address Translation Offset
> 0x0CF8, // Address Length
> ,, , TypeStatic)
> - WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
> - 0x0000, // Address Space Granularity
> - 0x0D00, // Address Range Minimum
> - 0xFFFF, // Address Range Maximum
> - 0x0000, // Address Translation Offset
> - 0xF300, // Address Length
> - ,, , TypeStatic)
> + BOARD_SPECIFIC_PCI_RESOURSES
> DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
> Cacheable, ReadWrite,
> 0x00000000, // Address Space Granularity
> 0x000A0000, // Address Range Minimum
> diff --git a/hw/i386/acpi-dsdt.dsl b/hw/i386/acpi-dsdt.dsl
> index 3dc4789..55b4794 100644
> --- a/hw/i386/acpi-dsdt.dsl
> +++ b/hw/i386/acpi-dsdt.dsl
> @@ -35,6 +35,35 @@ DefinitionBlock (
> /****************************************************************
> * PCI Bus definition
> ****************************************************************/
> +#define BOARD_SPECIFIC_PCI_RESOURSES \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0x0D00, \
> + 0xADFF, \
> + 0x0000, \
> + 0xA100, \
> + ,, , TypeStatic) \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0xAE14, \
> + 0xAEFF, \
> + 0x0000, \
> + 0x00EC, \
> + ,, , TypeStatic) \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0xAF20, \
> + 0xAFDF, \
> + 0x0000, \
> + 0x00C0, \
> + ,, , TypeStatic) \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0xAFE4, \
> + 0xFFFF, \
> + 0x0000, \
> + 0x501C, \
> + ,, , TypeStatic)
>
> Scope(\_SB) {
> Device(PCI0) {
Could you add some comments here to document where
does each number comes from please?
E.g. /* PIIX4_PROC_BASE + 0x100 */ or something.
Ideally we'd generate this based on defines used
by host, but that does not have to block merging
this patch.
> diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl
> index 9a43947..f3e5921 100644
> --- a/hw/i386/q35-acpi-dsdt.dsl
> +++ b/hw/i386/q35-acpi-dsdt.dsl
> @@ -48,6 +48,14 @@ DefinitionBlock (
> /****************************************************************
> * PCI Bus definition
> ****************************************************************/
> +#define BOARD_SPECIFIC_PCI_RESOURSES \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0x0D00, \
> + 0xFFFF, \
> + 0x0000, \
> + 0xF300, \
> + ,, , TypeStatic)
>
> Scope(\_SB) {
> Device(PCI0) {
> --
> 1.8.4.2
- Re: [Qemu-devel] [PATCH 5/9] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources,
Michael S. Tsirkin <=