Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add SIMD ld/st multiple

[Richard Henderson]

On 01/10/2014 09:12 AM, Peter Maydell wrote:
> +    TCGMemOp memop =  MO_TE + size;

Double space after =.  Multiple occurrences.

> +    if (is_postidx) {
> +        int rm = extract32(insn, 16, 5);
> +        if (rm == 31) {
> +            tcg_gen_mov_i64(cpu_reg_sp(s, rn), tcg_addr);
> +        } else {
> +            tcg_gen_add_i64(cpu_reg_sp(s, rn), cpu_reg(s, rn), cpu_reg(s, 
> rm));
> +        }

Second cpu_reg must be cpu_reg_sp as well.  Maybe better to hoist load of
tcg_rn to before initial assignment of tcg_addr?


r~