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[Qemu-devel] [PATCH target-arm v5 4/5] arm: Implement reset GPIO.


From: Peter Crosthwaite
Subject: [Qemu-devel] [PATCH target-arm v5 4/5] arm: Implement reset GPIO.
Date: Wed, 15 Jan 2014 01:14:51 -0800

Implement a reset GPIO for ARM CPUs. This allows individual reset of ARM
CPUs from device land without the need for the much unwanted reset API
calls.

The CPU is halted as long as the pin is held in reset. Releasing the
reset starts the CPU running again.

Signed-off-by: Peter Crosthwaite <address@hidden>
---
Until we have named GPIO support we are stuck with the hardcoded
indexing.

 target-arm/cpu.c | 23 +++++++++++++++++++++++
 target-arm/cpu.h |  8 +++++---
 2 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 52efd5d..83fd56e 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -196,6 +196,27 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int 
level)
     kvm_set_irq(kvm_state, kvm_irq, level ? 1 : 0);
 #endif
 }
+
+static void arm_cpu_reset_gpio(void *opaque, int irq, int level)
+{
+    CPUState *cpu = opaque;
+
+    if (level) {
+        cpu_reset(cpu);
+        cpu_interrupt(cpu, CPU_INTERRUPT_HALT);
+    } else {
+        cpu_reset_interrupt(cpu, CPU_INTERRUPT_HALT);
+        cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB);
+    }
+}
+
+
+static void arm_cpu_kvm_reset_gpio(void *opaque, int irq, int level)
+{
+#ifdef CONFIG_KVM
+    qemu_log_mask(LOG_UNIMP, "ARM Reset GPIO not implemented for KVM\n");
+#endif
+}
 #endif
 
 static inline void set_feature(CPUARMState *env, int feature)
@@ -218,8 +239,10 @@ static void arm_cpu_initfn(Object *obj)
     /* Our inbound IRQ and FIQ lines */
     if (kvm_enabled()) {
         qdev_init_gpio_in(DEVICE(cpu), arm_cpu_kvm_set_irq, 2);
+        qdev_init_gpio_in(DEVICE(cpu), arm_cpu_kvm_reset_gpio, 1);
     } else {
         qdev_init_gpio_in(DEVICE(cpu), arm_cpu_set_irq, 2);
+        qdev_init_gpio_in(DEVICE(cpu), arm_cpu_reset_gpio, 1);
     }
 
     cpu->gt_timer[GTIMER_PHYS] = timer_new(QEMU_CLOCK_VIRTUAL, GTIMER_SCALE,
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 198b6b8..7612d9f 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -78,9 +78,11 @@
 #define offsetoflow32(S, M) offsetof(S, M)
 #endif
 
-/* Meanings of the ARMCPU object's two inbound GPIO lines */
-#define ARM_CPU_IRQ 0
-#define ARM_CPU_FIQ 1
+/* Meanings of the ARMCPU object's inbound GPIO lines.  */
+#define ARM_CPU_IRQ         0
+#define ARM_CPU_FIQ         1
+/* reset GPIO is inited after irqs, so its index is one past FIQ */
+#define ARM_CPU_RESET       (ARM_CPU_FIQ + 1)
 
 typedef void ARMWriteCPFunc(void *opaque, int cp_info,
                             int srcreg, int operand, uint32_t value);
-- 
1.8.5.3




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