Re: [Qemu-devel] [PATCH] target-ppc: ppc64 target's virtio can be either endian. (v3)

[Alexander Graf]

On 17.01.2014, at 14:52, Greg Kurz <address@hidden> wrote:

> We base it on the OS endian, as reflected by the endianness of the
> interrupt vectors (handled through the ILE bit in the LPCR register).
> 
> This patch implements virtio_get_byteswap() over LPCR.
> 
> Using first_cpu to fetch the registers from KVM may look arbitrary
> and awkward, but it is okay because KVM sets/unsets the ILE bit on
> all CPUs.
> 
> Changes in v3:
> -  dropped the explicit calls to kvm_[get|put]_one_reg as LPCR is
>   now properly handled by the generic SPR code.
> Changes in v2:
> - call cpu_synchronize_state() instead of kvm_arch_get_registers().
> 
> Suggested-by: Benjamin Herrenschmidt <address@hidden>
> Signed-off-by: Rusty Russell <address@hidden>
> Signed-off-by: Greg Kurz <address@hidden>
> Reviewed-by: Alexander Graf <address@hidden>
> ---
> target-ppc/misc_helper.c |   12 ++++++++++++
> 1 file changed, 12 insertions(+)
> 
> diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c
> index 616aab6..e8fc8a3 100644
> --- a/target-ppc/misc_helper.c
> +++ b/target-ppc/misc_helper.c
> @@ -20,6 +20,8 @@
> #include "helper.h"
> 
> #include "helper_regs.h"
> +#include "hw/virtio/virtio.h"
> +#include "sysemu/kvm.h"
> 
> /*****************************************************************************/
> /* SPR accesses */
> @@ -116,3 +118,13 @@ void ppc_store_msr(CPUPPCState *env, target_ulong value)
> {
>     hreg_store_msr(env, value, 0);
> }
> +
> +bool virtio_get_byteswap(void)
> +{
> +    PowerPCCPU *cp = POWERPC_CPU(first_cpu);
> +    CPUPPCState *env = &cp->env;
> +
> +    cpu_synchronize_state(first_cpu);

LPCR_ILE only gets modified by QEMU, so you can even get rid of the synchronize 
call :).

Either way, this can only go in after the generic virtio byteswap mechanics are 
merged.


Alex

> +
> +    return env->spr[SPR_LPCR] & LPCR_ILE;
> +}
>