[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 5/8] target-arm: A64: Add logic ops from SIMD 3
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 5/8] target-arm: A64: Add logic ops from SIMD 3 same group |
Date: |
Tue, 21 Jan 2014 11:35:13 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 |
On 01/17/2014 10:44 AM, Peter Maydell wrote:
> + /* AND, BIC, ORR, ORN */
> + if (extract32(size, 0, 1)) {
> + tcg_gen_not_i64(tcg_op2, tcg_op2);
> + }
> + if (extract32(size, 1, 1)) {
> + tcg_gen_or_i64(tcg_res[pass], tcg_op1, tcg_op2);
> + } else {
> + tcg_gen_and_i64(tcg_res[pass], tcg_op1, tcg_op2);
> + }
It would be worthwhile to generate andc and orc directly instead
of a separate not.
r~
- Re: [Qemu-devel] [PATCH 8/8] target-arm: A64: Add SIMD shift by immediate, (continued)
- [Qemu-devel] [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group, Peter Maydell, 2014/01/17
- [Qemu-devel] [PATCH 4/8] target-arm: A64: Add top level decode for SIMD 3-same group, Peter Maydell, 2014/01/17
- [Qemu-devel] [PATCH 3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops, Peter Maydell, 2014/01/17
- [Qemu-devel] [PATCH 2/8] target-arm: A64: Add SIMD three-different ABDL instructions, Peter Maydell, 2014/01/17
- [Qemu-devel] [PATCH 5/8] target-arm: A64: Add logic ops from SIMD 3 same group, Peter Maydell, 2014/01/17
- Re: [Qemu-devel] [PATCH 5/8] target-arm: A64: Add logic ops from SIMD 3 same group,
Richard Henderson <=
- [Qemu-devel] [PATCH 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops, Peter Maydell, 2014/01/17
- Re: [Qemu-devel] [PATCH 0/8] target-arm: A64 Neon instructions, set 2, Richard Henderson, 2014/01/21