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Re: [Qemu-devel] QEMU ARM946 emulation, DIGIC, and MPU fault handling
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From: |
Andreas Färber |
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Subject: |
Re: [Qemu-devel] QEMU ARM946 emulation, DIGIC, and MPU fault handling |
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Date: |
Fri, 24 Jan 2014 00:36:15 +0100 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 |
Am 23.01.2014 23:25, schrieb Peter Maydell:
> This bug would also affect the ARMv7M CPU (Cortex-M3) we emulate,
> except that as far as I can tell we don't implement its MPU interface at all!
> (it uses memory mapped registers rather than cp15 regs, and they just
> aren't wired up in armv7m_nvic.c...)
That matches my memories of investigating Cortex-R4. There is some MPU
code present somewhere, but it appeared to be for some older CPU,
possibly OMAP2.
Regards,
Andreas
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