[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL v2 24/35] pc: PIIX DSDT: exclude CPU/PCI hotplug & GP
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL v2 24/35] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources |
Date: |
Sun, 26 Jan 2014 18:06:37 +0200 |
From: Igor Mammedov <address@hidden>
.. so that they might not be used by PCI devices.
Note:
Resort to concatenating templates with preprocessor help,
because 1.0b spec isn't supporting ConcatenateResTemplate,
as result Windows XP fails to execute PCI0._CRS method if
ConcatenateResTemplate() is used.
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/i386/acpi-dsdt-pci-crs.dsl | 8 +-------
hw/i386/acpi-dsdt.dsl | 32 ++++++++++++++++++++++++++++++++
hw/i386/q35-acpi-dsdt.dsl | 8 ++++++++
3 files changed, 41 insertions(+), 7 deletions(-)
diff --git a/hw/i386/acpi-dsdt-pci-crs.dsl b/hw/i386/acpi-dsdt-pci-crs.dsl
index b375a19..8b631d1 100644
--- a/hw/i386/acpi-dsdt-pci-crs.dsl
+++ b/hw/i386/acpi-dsdt-pci-crs.dsl
@@ -37,13 +37,7 @@ Scope(\_SB.PCI0) {
0x0000, // Address Translation Offset
0x0CF8, // Address Length
,, , TypeStatic)
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
- 0x0000, // Address Space Granularity
- 0x0D00, // Address Range Minimum
- 0xFFFF, // Address Range Maximum
- 0x0000, // Address Translation Offset
- 0xF300, // Address Length
- ,, , TypeStatic)
+ BOARD_SPECIFIC_PCI_RESOURSES
DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite,
0x00000000, // Address Space Granularity
0x000A0000, // Address Range Minimum
diff --git a/hw/i386/acpi-dsdt.dsl b/hw/i386/acpi-dsdt.dsl
index 3dc4789..f501c8d 100644
--- a/hw/i386/acpi-dsdt.dsl
+++ b/hw/i386/acpi-dsdt.dsl
@@ -35,6 +35,38 @@ DefinitionBlock (
/****************************************************************
* PCI Bus definition
****************************************************************/
+#define BOARD_SPECIFIC_PCI_RESOURSES \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0x0D00, \
+ 0xADFF, \
+ 0x0000, \
+ 0xA100, \
+ ,, , TypeStatic) \
+ /* 0xae00-0xae0e hole for PCI hotplug, hw/acpi/piix4.c:PCI_HOTPLUG_ADDR
*/ \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0xAE0F, \
+ 0xAEFF, \
+ 0x0000, \
+ 0x00F1, \
+ ,, , TypeStatic) \
+ /* 0xaf00-0xaf1f hole for CPU hotplug, hw/acpi/piix4.c:PIIX4_PROC_BASE */
\
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0xAF20, \
+ 0xAFDF, \
+ 0x0000, \
+ 0x00C0, \
+ ,, , TypeStatic) \
+ /* 0xafe0-0xafe3 hole for ACPI.GPE0, hw/acpi/piix4.c:GPE_BASE */ \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0xAFE4, \
+ 0xFFFF, \
+ 0x0000, \
+ 0x501C, \
+ ,, , TypeStatic)
Scope(\_SB) {
Device(PCI0) {
diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl
index 9a43947..f3e5921 100644
--- a/hw/i386/q35-acpi-dsdt.dsl
+++ b/hw/i386/q35-acpi-dsdt.dsl
@@ -48,6 +48,14 @@ DefinitionBlock (
/****************************************************************
* PCI Bus definition
****************************************************************/
+#define BOARD_SPECIFIC_PCI_RESOURSES \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0x0D00, \
+ 0xFFFF, \
+ 0x0000, \
+ 0xF300, \
+ ,, , TypeStatic)
Scope(\_SB) {
Device(PCI0) {
--
MST
- [Qemu-devel] [PULL v2 14/35] acpi unit-test: resolved iasl crash, (continued)
- [Qemu-devel] [PULL v2 14/35] acpi unit-test: resolved iasl crash, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 16/35] pc: make: fix dependencies: rebuild when included file is changed, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 15/35] acpi unit-test: do not fail on asl mismatch, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 17/35] pci: add pci_for_each_bus_depth_first, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 18/35] pcihp: generalization of piix4 acpi, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 19/35] piix4: add acpi pci hotplug support, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 20/35] acpi-build: enable hotplug for PCI bridges, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 21/35] acpi: factor out common cpu hotplug code for PIIX4/Q35, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 22/35] acpi: ich9: add CPU hotplug handling to Q35 machine, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 23/35] pc: set PRST base in DSDT depending on chipset, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 24/35] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources,
Michael S. Tsirkin <=
- [Qemu-devel] [PULL v2 25/35] pc: Q35 DSDT: exclude CPU hotplug IO range from PCI bus resources, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 26/35] pc: ACPI: expose PRST IO range via _CRS, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 27/35] pc: ACPI: unify source of CPU hotplug IO base/len, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 28/35] pc: ACPI: update acpi-dsdt.hex.generated q35-acpi-dsdt.hex.generated, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 29/35] acpi-test: update expected AML since recent changes, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 30/35] hw/pci: fix error flow in pci multifunction init, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 31/35] pc: Save size of RAM below 4GB, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 32/35] acpi: Fix PCI hole handling on build_srat(), Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 33/35] q35: gigabyte alignment for ram, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 34/35] q35: document gigabyte_align, Michael S. Tsirkin, 2014/01/26