Re: [Qemu-devel] [PATCH 9/9] target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP and VRINTM

[Peter Maydell]

On 14 January 2014 16:43, Will Newton <address@hidden> wrote:
> Add support for the AArch32 Advanced SIMD VRINTA, VRINTN, VRINTP
> and VRINTM instructions.

> +                        case NEON_2RM_VRINTN:
> +                        case NEON_2RM_VRINTA:
> +                        case NEON_2RM_VRINTM:
> +                        case NEON_2RM_VRINTP:
> +                        {
> +                            TCGv_i32 tcg_rmode;
> +                            TCGv_ptr fpstatus = get_fpstatus_ptr(1);
> +                            int rmode = fp_decode_rm[((op & 0x6) >> 1) ^ 1];
> +                            tcg_rmode = 
> tcg_const_i32(arm_rmode_to_sf(rmode));
> +                            gen_helper_set_neon_rmode(tcg_rmode, tcg_rmode,
> +                                                      cpu_env);
> +                            gen_helper_rints(cpu_F0s, cpu_F0s, fpstatus);
> +                            gen_helper_set_neon_rmode(tcg_rmode, tcg_rmode,
> +                                                      cpu_env);
> +                            tcg_temp_free_ptr(fpstatus);
> +                            tcg_temp_free_i32(tcg_rmode);
> +                            break;

This is almost exactly the same as the VRINTZ case so I think
it would be nicer to combine them:
    if (op == NEON_2RM_VRINTZ) {
        rmode = FPROUNDING_ZERO;
    } else {
        rmode = fp_decode_rm[...];
    }

&c.

thanks
-- PMM