Re: [Qemu-devel] [PATCH 07/24] target-arm: A64: Make cache ID registers visible to AArch64

[Peter Crosthwaite]

On Tue, Jan 28, 2014 at 6:45 PM, Peter Maydell <address@hidden> wrote:
> On 28 January 2014 01:46, Peter Crosthwaite
> <address@hidden> wrote:
>> There seem to be multiple instances in this series where you fallback
>> to open coded R/W accessor functions for the sake of access checks. Is
>> it better to define a bool check_access() fn hook in ARMCPRegInfo and
>> leave the actual write/read behaviour to the data driven mechanisms?
>> This may also minimise the need for raw_write hook usages as it serves
>> to isolate the actual state change into its own self contained
>> definition (whether open coded or not).
>
> Yes, I think it's probably going to be better to do that. We may need
> to make it more than just bool, though since for AArch64 the
> kind of exception can be different I think -- the specific syndrome
> information can vary.
>

I guess then it's simplest to just return in same format as read/write
accessors.

Regards,
Peter

> thanks
> -- PMM
>