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Re: [Qemu-devel] osx pci vs. 99fd437dee468609de8218f0eb3b16621fb6a9c9
From: |
Gabriel L. Somlo |
Subject: |
Re: [Qemu-devel] osx pci vs. 99fd437dee468609de8218f0eb3b16621fb6a9c9 |
Date: |
Tue, 4 Feb 2014 12:53:08 -0500 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Tue, Feb 04, 2014 at 05:36:57PM +0200, Michael S. Tsirkin wrote:
> Interesting. Possibly OSX wants an ACPI description of all slots
> even if they aren't hotpluggable?
> Could you try the following? (Note: compiled only, sorry - sick today).
Yep, this patch fixes it for me, everything looks "normal" again :)
Thanks, and hope you feel better soon !
--Gabriel
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index bc46b58..6a65ed6 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -643,6 +643,13 @@ static inline char acpi_get_hex(uint32_t val)
> #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start)
> #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start)
>
> +#define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start +
> 1)
> +#define ACPI_PCINOHP_OFFSET_ID (*ssdt_pcinohp_id - *ssdt_pcinohp_start)
> +#define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start)
> +#define ACPI_PCINOHP_OFFSET_EJ0 (*ssdt_pcinohp_ej0 - *ssdt_pcinohp_start)
> +#define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start)
> +#define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start)
> +
> #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */
> #define ACPI_SSDT_HEADER_LENGTH 36
>
> @@ -677,6 +684,16 @@ static void patch_pcihp(int slot, uint8_t *ssdt_ptr)
> ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot;
> }
>
> +static void patch_pcinohp(int slot, uint8_t *ssdt_ptr)
> +{
> + unsigned devfn = PCI_DEVFN(slot, 0);
> +
> + ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
> + ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
> + ssdt_ptr[ACPI_PCINOHP_OFFSET_ID] = slot;
> + ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot;
> +}
> +
> /* Assign BSEL property to all buses. In the future, this can be changed
> * to only assign to buses that support hotplug.
> */
> @@ -737,6 +754,7 @@ static void build_pci_bus_end(PCIBus *bus, void
> *bus_state)
> AcpiBuildPciBusHotplugState *parent = child->parent;
> GArray *bus_table = build_alloc_array();
> DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
> + DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX);
> uint8_t op;
> int i;
> QObject *bsel;
> @@ -764,38 +782,49 @@ static void build_pci_bus_end(PCIBus *bus, void
> *bus_state)
> build_append_byte(bus_table, 0x08); /* NameOp */
> build_append_nameseg(bus_table, "BSEL");
> build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel)));
> + }
>
> - memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable);
> + memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable);
> + memset(slot_device_present, 0x00, sizeof slot_device_present);
>
> - for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) {
> - PCIDeviceClass *pc;
> - PCIDevice *pdev = bus->devices[i];
> + for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) {
> + PCIDeviceClass *pc;
> + PCIDevice *pdev = bus->devices[i];
> + int slot = PCI_SLOT(i);
>
> - if (!pdev) {
> - continue;
> - }
> + if (!pdev) {
> + continue;
> + }
>
> - pc = PCI_DEVICE_GET_CLASS(pdev);
> + set_bit(slot, slot_device_present);
> + pc = PCI_DEVICE_GET_CLASS(pdev);
>
> - if (pc->no_hotplug || pc->is_bridge) {
> - int slot = PCI_SLOT(i);
> + if (pc->no_hotplug || pc->is_bridge) {
> + int slot = PCI_SLOT(i);
>
> - clear_bit(slot, slot_hotplug_enable);
> - }
> + clear_bit(slot, slot_hotplug_enable);
> }
> + }
>
> - /* Append Device object for each slot which supports eject */
> - for (i = 0; i < PCI_SLOT_MAX; i++) {
> - bool can_eject = test_bit(i, slot_hotplug_enable);
> - if (can_eject) {
> - void *pcihp = acpi_data_push(bus_table,
> - ACPI_PCIHP_SIZEOF);
> - memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
> - patch_pcihp(i, pcihp);
> - bus_hotplug_support = true;
> - }
> + /* Append Device object for each slot which supports eject */
> + for (i = 0; i < PCI_SLOT_MAX; i++) {
> + bool can_eject = test_bit(i, slot_hotplug_enable);
> + bool present = test_bit(i, slot_device_present);
> + if (can_eject) {
> + void *pcihp = acpi_data_push(bus_table,
> + ACPI_PCIHP_SIZEOF);
> + memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
> + patch_pcihp(i, pcihp);
> + bus_hotplug_support = true;
> + } else if (present) {
> + void *pcihp = acpi_data_push(bus_table,
> + ACPI_PCINOHP_SIZEOF);
> + memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
> + patch_pcinohp(i, pcihp);
> }
> + }
>
> + if (bsel) {
> method = build_alloc_method("DVNT", 2);
>
> for (i = 0; i < PCI_SLOT_MAX; i++) {
> @@ -974,7 +1003,14 @@ build_ssdt(GArray *table_data, GArray *linker,
>
> {
> AcpiBuildPciBusHotplugState hotplug_state;
> - PCIBus *bus = find_i440fx(); /* TODO: Q35 support */
> + Object *pci_host;
> + PCIBus *bus = NULL;
> + bool ambiguous;
> +
> + pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE,
> &ambiguous);
> + if (!ambiguous && pci_host) {
> + bus = PCI_HOST_BRIDGE(pci_host)->bus;
> + }
>
> build_pci_bus_state_init(&hotplug_state, NULL);
>
> diff --git a/hw/i386/ssdt-pcihp.dsl b/hw/i386/ssdt-pcihp.dsl
> index cc245c3..ea4b9e1 100644
> --- a/hw/i386/ssdt-pcihp.dsl
> +++ b/hw/i386/ssdt-pcihp.dsl
> @@ -46,5 +46,17 @@ DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC",
> "BXSSDTPCIHP", 0x1)
> }
> }
>
> + ACPI_EXTRACT_DEVICE_START ssdt_pcinohp_start
> + ACPI_EXTRACT_DEVICE_END ssdt_pcinohp_end
> + ACPI_EXTRACT_DEVICE_STRING ssdt_pcinohp_name
> +
> + // Extract the offsets of the device name, address dword and the slot
> + // name byte - we fill them in for each device.
> + Device(SBB) {
> + ACPI_EXTRACT_NAME_BYTE_CONST ssdt_pcinohp_id
> + Name(_SUN, 0xAA)
> + ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcinohp_adr
> + Name(_ADR, 0xAA0000)
> + }
> }
> }