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Re: [Qemu-devel] [PATCH v4 00/22] Steps towards per CPU address-spaces


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH v4 00/22] Steps towards per CPU address-spaces
Date: Sun, 9 Feb 2014 14:21:31 +0000

On 9 February 2014 13:31, Andreas Färber <address@hidden> wrote:
> Paolo,
>
> Am 03.02.2014 10:44, schrieb Edgar E. Iglesias:
>> Edgar E. Iglesias (22):
>>   exec: Make tb_invalidate_phys_addr input an AS
>>   exec: Make iotlb_to_region input an AS
>>   exec: Always initialize MemorySection address spaces
>>   exec: Make memory_region_section_get_iotlb use section AS
>>   memory: Add MemoryListener to typedefs.h
>
> I've been waiting on your review of this series since CPU changes start
> only with the next patch and I consider most of them a "memory" topic.
>
> Do you intend to review them or should I go ahead and queue these on
> qom-cpu if they compile and don't obviously break things?

I've just had a look at these, and I think the first part of the series
(up to and including "exec: Make cpu_memory_rw_debug
use the CPUs AS") looks good. I didn't check the fine detail
of all the conversions of the ld/st*_phys changes but they look
mostly mechanical anyway. So for that set of patches:

Reviewed-by: Peter Maydell <address@hidden>

I think we could queue that initial set for committal now (via
your qom tree or paolo's tree) if nobody else has review comments
to make.

I'm not so sure about the "find address space by name" and
what looks like using address space name strings to wire
address spaces up to CPUs, though. Also I suspect that really
we ought to be using MemoryRegions for this interface:

Consider a board model which puts together some RAM and
devices. It ought to have the same interface for passing this
up to the CPU whether it's doing so directly or via some SoC
container device. For the SoC container case, this has to be
by passing a MemoryRegion, since the SoC will want to add
some devices of its own to that region. So the interface for
passing things to the CPU should also be a MemoryRegion
(which the CPU then turns into an AddressSpace for its own
internal use.)

Are there cases involving IOMMUs or some other edgecase
that mean we might need to pass AddressSpaces around directly?

thanks
-- PMM



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