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Re: [Qemu-devel] [TCG] : Code flow understanding


From: Gaurav Sharma
Subject: Re: [Qemu-devel] [TCG] : Code flow understanding
Date: Mon, 10 Feb 2014 15:16:06 +0530

I was able to trace the flow to some extent but i still have some queries :
1. CPUARCHState is the main structure where we store the register
info. for e.g. - CPUARMState for ARM. We also main some local
temporaries cpu_R. So where and how are these temporary values
committed to the main structure ?

2. Where and when will the translation from guest virtual address to
host virtual address occur. For e.g. for a load instruction for arm
ldr r1, [r0] where will the address translation happen ?

On 2/8/14, Richard Henderson <address@hidden> wrote:
> On 02/05/2014 11:22 PM, Gaurav Sharma wrote:
>> I need some help regarding the flow of generating a TCG op and then
>> subsequent translation of any op into target instrn.
>
> That's most of tcg/tcg.c and tcg/foo/tcg-target.c.
>
> tcg_gen_code is the main entry point for beginning the compilation
> of the previously emitted tcg ops.
>
>
> r~
>



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