Re: [Qemu-devel] [PATCH v2 1/4] target-mips: add CPU definition for MIPS32R5

[Peter Maydell]

On 10 February 2014 13:51, Andreas Färber <address@hidden> wrote:
> Am 24.01.2014 17:18, schrieb Petar Jovanovic:
>> From: Petar Jovanovic <address@hidden>
>> --- a/target-mips/translate_init.c
>> +++ b/target-mips/translate_init.c
>> @@ -333,6 +333,31 @@ static const mips_def_t mips_defs[] =
>>          .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP | ASE_DSPR2,
>>          .mmu_type = MMU_TYPE_R4000,
>>      },
>> +    {
>> +        /* A generic CPU providing MIPS32 Release 5 features.
>> +           FIXME: Eventually this should be replaced by a real CPU model. */
>
> That is not really possible. QEMU needs to keep command line backwards
> compatibility, so if you add a generic model now, we will need to live
> with the generic model for a long time. What's the difficulty with
> taking "a real CPU model"? Is there no silicon yet or just a code name
> rather than a marketing name?

Good point, though I notice we have two MIPS CPUs already
with this same 'FIXME' comment about being generic.

thanks
-- PMM