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[Qemu-devel] [PULL 0/4] user-mode FR switch support for MIPS32r5
From: |
Petar Jovanovic |
Subject: |
[Qemu-devel] [PULL 0/4] user-mode FR switch support for MIPS32r5 |
Date: |
Mon, 10 Feb 2014 17:19:24 +0100 |
The following changes since commit 1f6b12f75f2c22f861d0202374033a7594c91707:
Merge remote-tracking branch 'remotes/mwalle/tags/lm32-fixes/20140204' into
staging (2014-02-08 15:57:51 +0000)
are available in the git repository at:
address@hidden:petar-jovanovic/qemu.git mips-ufrp
for you to fetch changes up to 736d120af4bf5f3e13b2f90c464b3a24847f78f0:
target-mips: add user-mode FR switch support for MIPS32r5 (2014-02-10
16:46:38 +0100)
----------------------------------------------------------------
Petar Jovanovic (4):
target-mips: add CPU definition for MIPS32R5
target-mips: add support for CP0_Config4
target-mips: add support for CP0_Config5
target-mips: add user-mode FR switch support for MIPS32r5
target-mips/cpu.h | 13 +++++++++++
target-mips/helper.h | 4 +++-
target-mips/mips-defs.h | 8 +++++++
target-mips/op_helper.c | 53 +++++++++++++++++++++++++++++++++++++++---
target-mips/translate.c | 39 +++++++++++++++++++++++++++----
target-mips/translate_init.c | 43 ++++++++++++++++++++++++++++++++++
6 files changed, 152 insertions(+), 8 deletions(-)
- [Qemu-devel] [PULL 0/4] user-mode FR switch support for MIPS32r5,
Petar Jovanovic <=
- [Qemu-devel] [PULL 2/4] target-mips: add support for CP0_Config4, Petar Jovanovic, 2014/02/10
- [Qemu-devel] [PULL 4/4] target-mips: add user-mode FR switch support for MIPS32r5, Petar Jovanovic, 2014/02/10
- [Qemu-devel] [PULL 3/4] target-mips: add support for CP0_Config5, Petar Jovanovic, 2014/02/10
- [Qemu-devel] [PULL 1/4] target-mips: add CPU definition for MIPS32R5, Petar Jovanovic, 2014/02/10
- Re: [Qemu-devel] [PULL 0/4] user-mode FR switch support for MIPS32r5, Peter Maydell, 2014/02/13
- Re: [Qemu-devel] [PULL 0/4] user-mode FR switch support for MIPS32r5, Peter Maydell, 2014/02/15