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Re: [Qemu-devel] [PATCH 0/8] A64: Neon support, fourth set
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 0/8] A64: Neon support, fourth set |
Date: |
Mon, 10 Feb 2014 12:15:45 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.3.0 |
On 02/07/2014 01:49 PM, Peter Maydell wrote:
> This is the fourth set of A64 Neon support patches. This set
> provides complete implementations of the categories:
> * scalar x indexed
> * vector x indexed
> * scalar three-different
> and fills in all the previously missing instructions in:
> * vector 3-reg-same
> * scalar 3-reg-same
>
> It includes adding support in softfloat for "fused multiply,
> add and then divide by two", because the A64 VRECPS instruction
> requires it.
>
> By my reckoning the parts that are still missing for Neon are:
> * parts of scalar shift-immediate and vector shift-immediate
> * parts of scalar-2-misc
> * most of vector-3-diff
> * parts of vector-2-misc
Except for the nit in 7/8,
Reviewed-by: Richard Henderson <address@hidden>
r~
- [Qemu-devel] [PATCH 7/8] softfloat: Support halving the result of muladd operation, (continued)
- [Qemu-devel] [PATCH 7/8] softfloat: Support halving the result of muladd operation, Peter Maydell, 2014/02/07
- [Qemu-devel] [PATCH 8/8] target-arm: A64: Implement remaining 3-same instructions, Peter Maydell, 2014/02/07
- [Qemu-devel] [PATCH 5/8] target-arm: A64: Implement SIMD FP compare and set insns, Peter Maydell, 2014/02/07
- [Qemu-devel] [PATCH 3/8] target-arm: A64: Implement SIMD scalar indexed instructions, Peter Maydell, 2014/02/07
- [Qemu-devel] [PATCH 6/8] target-arm: A64: Implement floating point pairwise insns, Peter Maydell, 2014/02/07
- [Qemu-devel] [PATCH 1/8] target-arm: A64: Implement plain vector SIMD indexed element insns, Peter Maydell, 2014/02/07
- [Qemu-devel] [PATCH 4/8] target-arm: A64: Implement scalar three different instructions, Peter Maydell, 2014/02/07
- Re: [Qemu-devel] [PATCH 0/8] A64: Neon support, fourth set,
Richard Henderson <=