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Re: [Qemu-devel] [PATCH v2] target-ppc: add extended opcodes for dcbt/dc
From: |
Alexander Graf |
Subject: |
Re: [Qemu-devel] [PATCH v2] target-ppc: add extended opcodes for dcbt/dcbtst |
Date: |
Thu, 20 Feb 2014 14:23:48 +0100 |
On 20.02.2014, at 14:20, Cédric Le Goater <address@hidden> wrote:
> The latest glibc provides a memrchr routine using an extended opcode
> of the 'dcbt' instruction :
>
> 00000000000a7cc0 <memrchr>:
> a7cc0: 11 00 4c 3c addis r2,r12,17
> a7cc4: b8 f8 42 38 addi r2,r2,-1864
> a7cc8: 14 2a e3 7c add r7,r3,r5
> a7ccc: d0 00 07 7c neg r0,r7
> a7cd0: ff ff e7 38 addi r7,r7,-1
> a7cd4: 78 1b 6a 7c mr r10,r3
> a7cd8: 24 06 e6 78 rldicr r6,r7,0,56
> a7cdc: 60 00 20 39 li r9,96
> a7ce0: 2c 32 09 7e dcbtt r9,r6
> ....
>
> which breaks grep, and other commands, in TCG mode :
>
> invalid bits: 02000000 for opcode: 1f - 16 - 08 (7e09322c) 00003fff799feca0
>
> This patch adds the extended opcodes for dcbt/dcbtst as no-ops just
> like the 'dcbt' instruction.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
Thanks, applied to ppc-next.
Alex