[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 00/45] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 00/45] target-arm queue |
Date: |
Wed, 26 Feb 2014 18:01:50 +0000 |
The following changes since commit d5001cf787ad0514839a81d0f2e771e01e076e21:
xilinx: Delete hw/include/xilinx.h (2014-02-26 14:54:45 +1000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20140226
for you to fetch changes up to c04018e93390e31b40044f3db92c173fb0ccb3d2:
dma/pl330: implement dmaadnh instruction (2014-02-26 17:20:09 +0000)
----------------------------------------------------------------
target-arm queue:
* fixes for various Coverity-spotted bugs
* support new KVM device control API for VGIC
* support KVM VGIC save/restore/migration
* more AArch64 system mode foundations
* support ARMv8 CRC instructions for A32/T32
* PL330 minor fixes and cleanup
----------------------------------------------------------------
Christoffer Dall (6):
hw/intc/arm_gic: Fix GIC_SET_LEVEL
linux-headers: Update from v3.14-rc3
kvm: Introduce kvm_arch_irqchip_create
kvm: Common device control API functions
arm: vgic device control api support
hw: arm_gic_kvm: Add KVM VGIC save/restore logic
Peter Crosthwaite (7):
dma/pl330: Delete overly verbose debug printf
dma/pl330: Fix misleading type
dma/pl330: printf format type sweep.
dma/pl330: Rename parent_obj
dma/pl330: Add event debugging printfs
dma/pl330: Fix buffer depth
dma/pl330: implement dmaadnh instruction
Peter Maydell (30):
hw/misc/arm_sysctl: Fix bad boundary check on mb clock accesses
hw/net/stellaris_enet: Avoid unintended sign extension
hw/timer/arm_timer: Avoid array overrun for bad addresses
target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS
ops
hw/intc/exynos4210_combiner: Don't overrun output_irq array in init
hw/arm/musicpal: Remove nonexistent CDTP2, CDTP3 registers
target-arm: Load correct access bits from ARMv5 level 2 page table
descriptors
target-arm: Fix raw read and write functions on AArch64 registers
target-arm: A64: Make cache ID registers visible to AArch64
target-arm: Implement AArch64 CurrentEL sysreg
target-arm: Implement AArch64 MIDR_EL1
target-arm: Implement AArch64 cache invalidate/clean ops
target-arm: Implement AArch64 TLB invalidate ops
target-arm: Implement AArch64 dummy MDSCR_EL1
target-arm: Implement AArch64 memory attribute registers
target-arm: Implement AArch64 SCTLR_EL1
target-arm: Implement AArch64 TCR_EL1
target-arm: Implement AArch64 VBAR_EL1
target-arm: Implement AArch64 TTBR*
target-arm: Implement AArch64 MPIDR
target-arm: Implement AArch64 generic timers
target-arm: Implement AArch64 ID and feature registers
target-arm: Implement AArch64 dummy breakpoint and watchpoint registers
target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI
target-arm: Get MMU index information correct for A64 code
target-arm: A64: Implement WFI
target-arm: Store AIF bits in env->pstate for AArch32
target-arm: A64: Implement MSR (immediate) instructions
target-arm: Implement AArch64 view of CPACR
target-arm: Add utility function for checking AA32/64 state of an EL
Will Newton (2):
include/qemu/crc32c.h: Rename include guards to match filename
target-arm: Add support for AArch32 ARMv8 CRC32 instructions
configure | 2 +-
cpu-exec.c | 4 +-
hw/arm/musicpal.c | 6 +-
hw/arm/pxa2xx.c | 6 +-
hw/dma/pl330.c | 55 ++--
hw/intc/arm_gic_kvm.c | 446 ++++++++++++++++++++++++++++++-
hw/intc/exynos4210_combiner.c | 2 +-
hw/intc/gic_internal.h | 2 +-
hw/misc/arm_sysctl.c | 4 +-
hw/net/stellaris_enet.c | 3 +-
hw/timer/arm_timer.c | 2 +
include/hw/intc/arm_gic_common.h | 1 +
include/qemu/crc32c.h | 4 +-
include/sysemu/kvm.h | 34 +++
kvm-all.c | 50 +++-
linux-headers/asm-arm/kvm.h | 28 ++
linux-headers/asm-arm64/kvm.h | 30 ++-
linux-headers/asm-powerpc/kvm.h | 3 +
linux-headers/asm-x86/hyperv.h | 16 +-
linux-headers/linux/kvm.h | 1 +
stubs/Makefile.objs | 1 +
stubs/kvm.c | 7 +
target-arm/cpu-qom.h | 10 +
target-arm/cpu.c | 13 +-
target-arm/cpu.h | 80 ++++--
target-arm/cpu64.c | 1 +
target-arm/helper.c | 562 +++++++++++++++++++++++++++++++--------
target-arm/helper.h | 5 +
target-arm/kvm.c | 55 +++-
target-arm/kvm_arm.h | 17 +-
target-arm/op_helper.c | 25 ++
target-arm/translate-a64.c | 39 ++-
target-arm/translate.c | 56 ++++
trace-events | 1 +
34 files changed, 1379 insertions(+), 192 deletions(-)
create mode 100644 stubs/kvm.c
- [Qemu-devel] [PULL 00/45] target-arm queue,
Peter Maydell <=
- [Qemu-devel] [PULL 11/45] kvm: Common device control API functions, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 10/45] kvm: Introduce kvm_arch_irqchip_create, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 16/45] target-arm: Implement AArch64 CurrentEL sysreg, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 42/45] dma/pl330: Rename parent_obj, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 43/45] dma/pl330: Add event debugging printfs, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 45/45] dma/pl330: implement dmaadnh instruction, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 25/45] target-arm: Implement AArch64 TTBR*, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 40/45] dma/pl330: Fix misleading type, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 39/45] dma/pl330: Delete overly verbose debug printf, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 41/45] dma/pl330: printf format type sweep., Peter Maydell, 2014/02/26