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Re: [Qemu-devel] AMD Opteron 6276 to Intel Xeon E5645 live migration fai
From: |
Nick Thomas |
Subject: |
Re: [Qemu-devel] AMD Opteron 6276 to Intel Xeon E5645 live migration failure |
Date: |
Fri, 28 Feb 2014 13:15:24 +0000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.3.0 |
On 28/02/14 12:57, Paolo Bonzini wrote:
> Il 28/02/2014 13:16, Nick Thomas ha scritto:
>> I'd love to get this working, but I'm a little ignorant on where to
>> begin, or even if it's possible at all. Are these CPUs just too old, or
>> is a fixup missing in qemu (or kvm)?
>
> It's the latter (in kvm). Note that for migration to work, especially
> for such different models, you have to disable CPU features that aren't
> present in both models. In general the way to do this is to add "-cpu".
>
> I'd start debugging with "-cpu kvm64" on both sides.
>
> Paolo
Sorry, I forgot to mention - most of my tests have been -cpu
qemu64,-vmx,-svm. I've just re-run the minimal ones with that, and
kvm64, for sanity. Same behaviour.
In the interests of debugging, I guess the next step is to attach gdb to
the destination and find out what's happening around the time the error
messages are pushed out?
I found an earlier thread (
http://www.spinics.net/lists/kvm/msg73478.html ) with a similar flavour
that referenced a "vmxcap" tool - the output of that is here:
Basic VMX Information
Revision 15
VMCS size 1024
VMCS restricted to 32 bit addresses no
Dual-monitor support yes
VMCS memory type 6
INS/OUTS instruction information yes
IA32_VMX_TRUE_*_CTLS support yes
pin-based controls
External interrupt exiting yes
NMI exiting yes
Virtual NMIs yes
Activate VMX-preemption timer yes
Process posted interrupts no
primary processor-based controls
Interrupt window exiting yes
Use TSC offsetting yes
HLT exiting yes
INVLPG exiting yes
MWAIT exiting yes
RDPMC exiting yes
RDTSC exiting yes
CR3-load exiting default
CR3-store exiting default
CR8-load exiting yes
CR8-store exiting yes
Use TPR shadow yes
NMI-window exiting yes
MOV-DR exiting yes
Unconditional I/O exiting yes
Use I/O bitmaps yes
Monitor trap flag yes
Use MSR bitmaps yes
MONITOR exiting yes
PAUSE exiting yes
Activate secondary control yes
secondary processor-based controls
Virtualize APIC accesses yes
Enable EPT yes
Descriptor-table exiting yes
Enable RDTSCP yes
Virtualize x2APIC mode yes
Enable VPID yes
WBINVD exiting yes
Unrestricted guest yes
APIC register emulation no
Virtual interrupt delivery no
PAUSE-loop exiting yes
RDRAND exiting no
Enable INVPCID no
Enable VM functions no
VMCS shadowing no
EPT-violation #VE no
VM-Exit controls
Save debug controls default
Host address-space size yes
Load IA32_PERF_GLOBAL_CTRL yes
Acknowledge interrupt on exit yes
Save IA32_PAT yes
Load IA32_PAT yes
Save IA32_EFER yes
Load IA32_EFER yes
Save VMX-preemption timer value yes
VM-Entry controls
Load debug controls default
IA-64 mode guest yes
Entry to SMM yes
Deactivate dual-monitor treatment yes
Load IA32_PERF_GLOBAL_CTRL yes
Load IA32_PAT yes
Load IA32_EFER yes
Miscellaneous data
VMX-preemption timer scale (log2) 7
Store EFER.LMA into IA-32e mode guest control yes
HLT activity state yes
Shutdown activity state yes
Wait-for-SIPI activity state yes
IA32_SMBASE support no
Number of CR3-target values 4
MSR-load/store count recommenation 0
IA32_SMM_MONITOR_CTL[2] can be set to 1 no
VMWRITE to VM-exit information fields no
MSEG revision identifier 0
VPID and EPT capabilities
Execute-only EPT translations yes
Page-walk length 4 yes
Paging-structure memory type UC yes
Paging-structure memory type WB yes
2MB EPT pages yes
1GB EPT pages yes
INVEPT supported yes
EPT accessed and dirty flags no
Single-context INVEPT yes
All-context INVEPT yes
INVVPID supported yes
Individual-address INVVPID yes
Single-context INVVPID yes
All-context INVVPID yes
Single-context-retaining-globals INVVPID yes
VM Functions
EPTP Switching no
Mostly Greek, but I assume one of the things labeled "no" is the source
of my woes?
/Nick