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[Qemu-devel] [PATCH 06/14] tcg-sparc: Use the RETURN instruction
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 06/14] tcg-sparc: Use the RETURN instruction |
Date: |
Mon, 17 Mar 2014 11:37:48 -0700 |
Saves one insn per TB exit over JMPL+RESTORE.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/sparc/tcg-target.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index fb5ba27..d086c10 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -219,6 +219,7 @@ static const int tcg_target_call_oarg_regs[] = {
#define RDY (INSN_OP(2) | INSN_OP3(0x28) | INSN_RS1(0))
#define WRY (INSN_OP(2) | INSN_OP3(0x30) | INSN_RD(0))
#define JMPL (INSN_OP(2) | INSN_OP3(0x38))
+#define RETURN (INSN_OP(2) | INSN_OP3(0x39))
#define SAVE (INSN_OP(2) | INSN_OP3(0x3c))
#define RESTORE (INSN_OP(2) | INSN_OP3(0x3d))
#define SETHI (INSN_OP(0) | INSN_OP2(0x4))
@@ -1136,10 +1137,15 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc, const TCGArg *args,
switch (opc) {
case INDEX_op_exit_tb:
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I0, args[0]);
- tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, JMPL);
- tcg_out32(s, RESTORE | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_G0) |
- INSN_RS2(TCG_REG_G0));
+ if (check_fit_tl(args[0], 13)) {
+ tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN);
+ tcg_out_movi_imm13(s, TCG_REG_O0, args[0]);
+ } else {
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I0, args[0] & ~0x3ff);
+ tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN);
+ tcg_out_arithi(s, TCG_REG_O0, TCG_REG_O0,
+ args[0] & 0x3ff, ARITH_OR);
+ }
break;
case INDEX_op_goto_tb:
if (s->tb_jmp_offset) {
--
1.8.5.3
- [Qemu-devel] [PATCH 00/14] tcg/sparc v8plus code generation, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 01/14] tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changes, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 02/14] tcg: Add INDEX_op_trunc_i32, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 03/14] tcg-sparc: Remove most uses of TCG_TARGET_REG_BITS, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 04/14] tcg-sparc: Support trunc_i32, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 05/14] tcg-sparc: Use 64-bit registers with sparcv8plus, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 06/14] tcg-sparc: Use the RETURN instruction,
Richard Henderson <=
- [Qemu-devel] [PATCH 07/14] tcg-sparc: Implement muls2_i32, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 08/14] tcg-sparc: Tidy check_fit_* tests, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 09/14] tcg-sparc: Don't handle mov/movi in tcg_out_op, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 10/14] tcg-sparc: Hoist common argument loads in tcg_out_op, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 11/14] tcg-sparc: Fixup function argument types, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 12/14] tcg-sparc: Fix small 32-bit movi, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 13/14] tcg-sparc: Fix 32-bit constant arguments tests, Richard Henderson, 2014/03/17
- [Qemu-devel] [PATCH 14/14] tcg-sparc: Accept stores of zero, Richard Henderson, 2014/03/17