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Re: [Qemu-devel] [PATCH 01/26] tcg-aarch64: Properly detect SIGSEGV writ


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH 01/26] tcg-aarch64: Properly detect SIGSEGV writes
Date: Mon, 24 Mar 2014 12:41:51 +0000

On 15 March 2014 02:48, Richard Henderson <address@hidden> wrote:
> Since the kernel doesn't pass any info on the reason for the fault,
> disassemble the instruction to detect a store.

Incidentally, I've been wondering if we could improve
handle_cpu_signal so that at least the "check if this
fault was because we write-protected a page when we
translated code out of it" part doesn't depend on the
CPU-specific signal handler setting is_write correctly.
I think most guests don't depend on getting exactly
correct fault information, but if we don't track our
own page protection correctly then even simple guest
binaries don't work.

(Also, shouldn't we ideally speaking see if the SIGSEGV
was the result of attempting to execute from non-executable
memory?)

thanks
-- PMM



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