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Re: [Qemu-devel] [PATCH v6 18/37] target-arm: Move arm_log_exception() i


From: Peter Crosthwaite
Subject: Re: [Qemu-devel] [PATCH v6 18/37] target-arm: Move arm_log_exception() into internals.h
Date: Mon, 14 Apr 2014 15:57:53 +1000

On Fri, Apr 11, 2014 at 2:15 AM, Peter Maydell <address@hidden> wrote:
> Move arm_log_exception() into internals.h so we can use it from
> helper-a64.c for the AArch64 exception entry code.
>
> Signed-off-by: Peter Maydell <address@hidden>

Reviewed-by: Peter Crosthwaite <address@hidden>

> ---
>  target-arm/helper.c    | 31 -------------------------------
>  target-arm/internals.h | 31 +++++++++++++++++++++++++++++++
>  2 files changed, 31 insertions(+), 31 deletions(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 68f8c6a..e9b64f3 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -2957,37 +2957,6 @@ static void do_v7m_exception_exit(CPUARMState *env)
>         pointer.  */
>  }
>
> -/* Exception names for debug logging; note that not all of these
> - * precisely correspond to architectural exceptions.
> - */
> -static const char * const excnames[] = {
> -    [EXCP_UDEF] = "Undefined Instruction",
> -    [EXCP_SWI] = "SVC",
> -    [EXCP_PREFETCH_ABORT] = "Prefetch Abort",
> -    [EXCP_DATA_ABORT] = "Data Abort",
> -    [EXCP_IRQ] = "IRQ",
> -    [EXCP_FIQ] = "FIQ",
> -    [EXCP_BKPT] = "Breakpoint",
> -    [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit",
> -    [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage",
> -    [EXCP_STREX] = "QEMU intercept of STREX",
> -};
> -
> -static inline void arm_log_exception(int idx)
> -{
> -    if (qemu_loglevel_mask(CPU_LOG_INT)) {
> -        const char *exc = NULL;
> -
> -        if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
> -            exc = excnames[idx];
> -        }
> -        if (!exc) {
> -            exc = "unknown";
> -        }
> -        qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc);
> -    }
> -}
> -
>  void arm_v7m_cpu_do_interrupt(CPUState *cs)
>  {
>      ARMCPU *cpu = ARM_CPU(cs);
> diff --git a/target-arm/internals.h b/target-arm/internals.h
> index de79dfc..d63a975 100644
> --- a/target-arm/internals.h
> +++ b/target-arm/internals.h
> @@ -39,6 +39,37 @@ static inline bool excp_is_internal(int excp)
>          || excp == EXCP_STREX;
>  }
>
> +/* Exception names for debug logging; note that not all of these
> + * precisely correspond to architectural exceptions.
> + */
> +static const char * const excnames[] = {
> +    [EXCP_UDEF] = "Undefined Instruction",
> +    [EXCP_SWI] = "SVC",
> +    [EXCP_PREFETCH_ABORT] = "Prefetch Abort",
> +    [EXCP_DATA_ABORT] = "Data Abort",
> +    [EXCP_IRQ] = "IRQ",
> +    [EXCP_FIQ] = "FIQ",
> +    [EXCP_BKPT] = "Breakpoint",
> +    [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit",
> +    [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage",
> +    [EXCP_STREX] = "QEMU intercept of STREX",
> +};
> +
> +static inline void arm_log_exception(int idx)
> +{
> +    if (qemu_loglevel_mask(CPU_LOG_INT)) {
> +        const char *exc = NULL;
> +
> +        if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
> +            exc = excnames[idx];
> +        }
> +        if (!exc) {
> +            exc = "unknown";
> +        }
> +        qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc);
> +    }
> +}
> +
>  /* Scale factor for generic timers, ie number of ns per tick.
>   * This gives a 62.5MHz timer.
>   */
> --
> 1.9.1
>
>



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