[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 51/51] target-arm: A64: fix unallocated test of scala
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 51/51] target-arm: A64: fix unallocated test of scalar SQXTUN |
Date: |
Thu, 17 Apr 2014 11:34:06 +0100 |
From: Alex Bennée <address@hidden>
The test for the U bit was incorrectly inverted in the scalar case of SQXTUN.
This doesn't affect the vector case as the U bit is used to select XTN(2).
Reported-by: Hao Liu <address@hidden>
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Claudio Fontana <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Cc: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 188287d..d86b8ff 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -7708,7 +7708,7 @@ static void disas_simd_scalar_two_reg_misc(DisasContext
*s, uint32_t insn)
}
break;
case 0x12: /* SQXTUN */
- if (u) {
+ if (!u) {
unallocated_encoding(s);
return;
}
--
1.9.1
- [Qemu-devel] [PULL 00/51] target-arm queue, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 48/51] misc: zynq_slcr: Make DB_PRINTs always compile, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 49/51] net: cadence_gem: Make phy respond to broadcast, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 47/51] misc: zynq_slcr: Convert SBD::init to object init, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 50/51] arm: translate.c: Fix smlald Instruction, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 51/51] target-arm: A64: fix unallocated test of scalar SQXTUN,
Peter Maydell <=
- [Qemu-devel] [PULL 45/51] allwinner-emac: update irq status after writes to interrupt registers, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 44/51] allwinner-emac: set autonegotiation complete bit on link up, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 43/51] allwinner-a10-pit: implement prescaler and source selection, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 41/51] allwinner-a10-pit: avoid generation of spurious interrupts, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 42/51] allwinner-a10-pit: use level triggered interrupts, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 01/51] target-arm: Split out private-to-target functions into internals.h, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 39/51] allwinner-a10-pic: set vector address when an interrupt is pending, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 46/51] misc: zynq-slcr: Rewrite, Peter Maydell, 2014/04/17
- [Qemu-devel] [PULL 38/51] timer: cadence_ttc: Fix match register write logic, Peter Maydell, 2014/04/17