[Qemu-devel] [PATCH 00/40] target-alpha queue

[Richard Henderson]

These have been queued for 2.1.

The alpha translator was written before the tcg optimizer, and it
believed that it should constant fold everything by hand.  There
are a few idioms that are still worth special casing wrt the zero
register, but for the most part these all go away.  The result is
fantastically more readable.

r~


Paolo Bonzini (1):
  target-alpha: fix the braces

Richard Henderson (39):
  target-alpha: Introduce REQUIRE_TB_FLAG
  target-alpha: Introduce REQUIRE_REG_31
  target-alpha: Introduce functions for source/sink
  target-alpha: Convert opcode 0x11 to source/sink
  target-alpha: Convert opcode 0x12 to source/sink
  target-alpha: Convert opcode 0x13 to source/sink
  target-alpha: Convert opcode 0x14 to source/sink
  target-alpha: Convert opcode 0x17 to source/sink
  target-alpha: Convert opcode 0x18 to source/sink
  target-alpha: Convert opcode 0x1A to source/sink
  target-alpha: Convert opcode 0x1B to source/sink
  target-alpha: Convert opcode 0x1C to source/sink
  target-alpha: Convert opcode 0x1E to source/sink
  target-alpha: Convert opcode 0x1F to source/sink
  target-alpha: Convert gen_load/store_mem to source/sink
  target-alpha: Convert gen_store_conditional to source/sink
  target-alpha: Convert gen_cmp to source/sink
  target-alpha: Convert ARITH3_EX to source/sink
  target-alpha: Convert gen_cmov to source/sink
  target-alpha: Convert gen_msk_h/l to source/sink
  target-alpha: Convert gen_ext_h/l to source/sink
  target-alpha: Convert gen_ins_h/l to source/sink
  target-alpha: Convert gen_zap/not to source/sink
  target-alpha: Convert FARITH2 to source/sink
  target-alpha: Convert FARITH3 to source/sink
  target-alpha: Convert ARITH3 to source/sink
  target-alpha: Convert MVIOP2 to source/sink
  target-alpha: Convert gen_ieee_input to source/sink
  target-alpha: Convert most ieee insns to source/sink
  target-alpha: Convert gen_bcond to source/sink
  target-alpha: Convert gen_fcmov to source/sink
  target-alpha: Convert gen_fcvtlq/ql to source/sink
  target-alpha: Convert gen_cpys et al to source/sink
  target-alpha: Convert mfpr/mtpr to source/sink
  target-alpha: Use extract to get insn fields
  target-alpha: Use non-local temps for zero/sink
  target-alpha: Don't issue goto_tb under singlestep
  target-alpha: Tidy alpha_translate_init
  target-alpha: Remove cpu_unique, cpu_sysval, cpu_usp

 target-alpha/fpu_helper.c |    7 +
 target-alpha/helper.h     |    1 +
 target-alpha/translate.c  | 2363 +++++++++++++++++----------------------------
 3 files changed, 879 insertions(+), 1492 deletions(-)

-- 
1.9.0