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Re: [Qemu-devel] [PATCH v1 2/4] target-arm: A64: Handle blr lr
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH v1 2/4] target-arm: A64: Handle blr lr |
Date: |
Thu, 01 May 2014 14:55:07 +0100 |
User-agent: |
mu4e 0.9.9.6pre3; emacs 24.3.90.7 |
Edgar E. Iglesias <address@hidden> writes:
> On Thu, May 01, 2014 at 10:31:06AM +0100, Peter Maydell wrote:
>> On 1 May 2014 10:02, Alex Bennée <address@hidden> wrote:
>> >
>> > Edgar E. Iglesias <address@hidden> writes:
>> >
>> >> From: "Edgar E. Iglesias" <address@hidden>
>> >>
>> >> For linked branches, updates to the link register happen
>> >> conceptually after the read of the branch target register.
>> >>
>> >> Signed-off-by: Edgar E. Iglesias <address@hidden>
>> >
>> > I'm trying to think of a case where this could actually cause a problem
>> > but I can't. However from a clarity/correctness point of view it's
>> > better.
>>
>> Well, we actually misexecute "BLR LR" otherwise, right?
>> That's probably not very common but there's no reason it
>> might not occur (eg call to a function pointer from a
>> function where LR has been saved on entry and is free
>> for use as a generic tempreg).
>
> Right. For example, the kernel/kvm actually does this in
> arch/arm64/kvm/hyp.S:773: blr lr
Of course, I see know ;-)
--
Alex Bennée
[Qemu-devel] [PATCH v1 3/4] target-arm: A64: Fix a typo when declaring TLBI ops, Edgar E. Iglesias, 2014/05/01
[Qemu-devel] [PATCH v1 4/4] target-arm: Correct a comment refering to EL0, Edgar E. Iglesias, 2014/05/01