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Re: [Qemu-devel] [PATCH 3/8] hw/display/pxa2xx_lcd: Fix 16bpp+alpha and
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [PATCH 3/8] hw/display/pxa2xx_lcd: Fix 16bpp+alpha and 18bpp+alpha palette formats |
Date: |
Sat, 10 May 2014 09:35:01 +1000 |
On Fri, May 9, 2014 at 4:46 AM, Peter Maydell <address@hidden> wrote:
> The pxa2xx palette entry "16bpp plus transparency" format is
> xxxxxxxTRRRRR000GGGGGG00BBBBB000, and "18bpp plus transparency" is
> xxxxxxxTRRRRRR00GGGGGG00BBBBBB00.
>
> Correct errors in the code for reading these and converting
> them to the internal format. In particular, the buggy code
> was attempting to mask out bit 24 of a uint16_t, which
> Coverity spotted as an error.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> hw/display/pxa2xx_lcd.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/hw/display/pxa2xx_lcd.c b/hw/display/pxa2xx_lcd.c
> index 09cdf17..fce013d 100644
> --- a/hw/display/pxa2xx_lcd.c
> +++ b/hw/display/pxa2xx_lcd.c
> @@ -620,13 +620,13 @@ static void pxa2xx_palette_parse(PXA2xxLCDState *s, int
> ch, int bpp)
> src += 2;
> break;
> case 1: /* 16 bpp plus transparency */
> - alpha = *(uint16_t *) src & (1 << 24);
> + alpha = *(uint32_t *) src & (1 << 24);
> if (s->control[0] & LCCR0_CMS)
> - r = g = b = *(uint16_t *) src & 0xff;
> + r = g = b = *(uint32_t *) src & 0xff;
> else {
> - r = (*(uint16_t *) src & 0xf800) >> 8;
> - g = (*(uint16_t *) src & 0x07e0) >> 3;
> - b = (*(uint16_t *) src & 0x001f) << 3;
> + r = (*(uint32_t *) src & 0x7c0000) >> 15;
16BPP format (pasted from above with byte spacing)
xxxxxxxT RRRRR000 GGGGGG00 BBBBB000
So shouldn't r be 0xf80000 >> 16?
Regards,
Peter
> + g = (*(uint32_t *) src & 0x00fc00) >> 8;
> + b = (*(uint32_t *) src & 0x0000f8);
> }
> src += 2;
> break;
> @@ -635,9 +635,9 @@ static void pxa2xx_palette_parse(PXA2xxLCDState *s, int
> ch, int bpp)
> if (s->control[0] & LCCR0_CMS)
> r = g = b = *(uint32_t *) src & 0xff;
> else {
> - r = (*(uint32_t *) src & 0xf80000) >> 16;
> + r = (*(uint32_t *) src & 0xfc0000) >> 16;
> g = (*(uint32_t *) src & 0x00fc00) >> 8;
> - b = (*(uint32_t *) src & 0x0000f8);
> + b = (*(uint32_t *) src & 0x0000fc);
> }
> src += 4;
> break;
> --
> 1.9.2
>
>
- Re: [Qemu-devel] [PATCH 7/8] hw/arm/stellaris: Correct handling of GPTM TAR register, (continued)
- [Qemu-devel] [PATCH 8/8] hw/arm/omap_gpmc: Avoid buffer overrun filling prefetch FIFO, Peter Maydell, 2014/05/08
- [Qemu-devel] [PATCH 4/8] hw/arm/omap1: Avoid unintended sign extension writing omap_rtc YEARS_REG, Peter Maydell, 2014/05/08
- [Qemu-devel] [PATCH 1/8] hw/intc/allwinner-a10-pic: Add missing 'break', Peter Maydell, 2014/05/08
- [Qemu-devel] [PATCH 2/8] hw/net/cadence_gem: Remove dead code, Peter Maydell, 2014/05/08
- [Qemu-devel] [PATCH 3/8] hw/display/pxa2xx_lcd: Fix 16bpp+alpha and 18bpp+alpha palette formats, Peter Maydell, 2014/05/08
- Re: [Qemu-devel] [PATCH 3/8] hw/display/pxa2xx_lcd: Fix 16bpp+alpha and 18bpp+alpha palette formats,
Peter Crosthwaite <=
- [Qemu-devel] [PATCH 6/8] hw/timer/exynos4210_mct: Avoid overflow in exynos4210_ltick_recalc_count, Peter Maydell, 2014/05/08
- [Qemu-devel] [PATCH 5/8] hw/dma/omap_dma: Add (uint32_t) casts when shifting uint16_t by 16, Peter Maydell, 2014/05/08