Re: [Qemu-devel] [PATCH 2/2] target-mips: implement UserLocal Register

[Richard Henderson]

On 05/16/2014 11:13 AM, Petar Jovanovic wrote:
> +target_ulong helper_rdhwr_ul(CPUMIPSState *env)
> +{
> +    if ((env->hflags & MIPS_HFLAG_CP0) ||
> +        (env->CP0_HWREna & (1 << 29))) {
> +        return env->CP0_UserLocal;
> +    } else {
> +        helper_raise_exception(env, EXCP_RI);
> +    }
> +
> +    return 0;
> +}
> +

You shouldn't need a helper at all.  We're supposed to check all of these
sorts of permissions at translation time, so you should be able to issue a
load or an exception directly from the translator.

> +            if (env->CP0_Config3 & (1 << CP0C3_ULRI)) {

What is this check, and why isn't it present in ctx->hflags?

> +                tcg_gen_ld_tl(arg, cpu_env,
> +                              offsetof(CPUMIPSState, CP0_UserLocal));
> +                tcg_gen_ext32s_tl(arg, arg);

One operation: tcg_gen_ld32s_tl.

> #else
> -        /* XXX: Some CPUs implement this in hardware.
> -           Not supported yet. */
> +        save_cpu_state(ctx, 1);
> +        gen_helper_rdhwr_ul(t0, cpu_env);
> +        gen_store_gpr(t0, rt);
> +        break;
>  #endif
>  

This should be at least partially merged with the user-only tls_value code.


r~