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Re: [Qemu-devel] [PATCH 2/2] target-mips: implement UserLocal Register
From: |
James Hogan |
Subject: |
Re: [Qemu-devel] [PATCH 2/2] target-mips: implement UserLocal Register |
Date: |
Thu, 22 May 2014 01:03:55 +0100 |
User-agent: |
KMail/4.12.5 (Linux/3.15.0-rc5+; KDE/4.12.5; x86_64; ; ) |
Hi Petar,
On Friday 16 May 2014 20:13:34 Petar Jovanovic wrote:
> From: Petar Jovanovic <address@hidden>
>
> From MIPS documentation (Volume III):
>
> UserLocal Register (CP0 Register 4, Select 2)
> Compliance Level: Recommended.
>
> The UserLocal register is a read-write register that is not interpreted by
> the hardware and conditionally readable via the RDHWR instruction.
>
> This register only exists if the Config3-ULRI register field is set.
>
> Privileged software may write this register with arbitrary information and
> make it accessable to unprivileged software via register 29 (ULR) of the
> RDHWR instruction. To do so, bit 29 of the HWREna register must be set to a
> 1 to enable unprivileged access to the register.
>
> Signed-off-by: Petar Jovanovic <address@hidden>
> ---
> target-mips/cpu.h | 2 ++
> target-mips/helper.h | 1 +
> target-mips/op_helper.c | 20 +++++++++++++++++++-
> target-mips/translate.c | 43 +++++++++++++++++++++++++++++++++++++++++--
> 4 files changed, 63 insertions(+), 3 deletions(-)
I think you need to add it to cpu_save/cpu_load in target-mips/machine.c too,
otherwise snapshotting and live migration may break.
Cheers
James