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[Qemu-devel] [PATCH v4 06/21] target-arm: Use a 1:1 mapping between EL a
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v4 06/21] target-arm: Use a 1:1 mapping between EL and MMU index |
Date: |
Fri, 23 May 2014 10:42:03 +1000 |
From: "Edgar E. Iglesias" <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target-arm/cpu.h | 8 ++++----
target-arm/translate.h | 6 +-----
2 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 11b7a0b..62d85ff 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1080,12 +1080,12 @@ static inline CPUARMState *cpu_init(const char
*cpu_model)
#define cpu_list arm_cpu_list
/* MMU modes definitions */
-#define MMU_MODE0_SUFFIX _kernel
-#define MMU_MODE1_SUFFIX _user
-#define MMU_USER_IDX 1
+#define MMU_MODE0_SUFFIX _user
+#define MMU_MODE1_SUFFIX _kernel
+#define MMU_USER_IDX 0
static inline int cpu_mmu_index (CPUARMState *env)
{
- return arm_current_pl(env) ? 0 : 1;
+ return arm_current_pl(env);
}
#include "exec/cpu-all.h"
diff --git a/target-arm/translate.h b/target-arm/translate.h
index 8737af0..31a0104 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -54,11 +54,7 @@ static inline int arm_dc_feature(DisasContext *dc, int
feature)
static inline int get_mem_index(DisasContext *s)
{
-#ifdef CONFIG_USER_ONLY
- return 1;
-#else
- return s->user;
-#endif
+ return s->current_pl;
}
/* target-specific extra values for is_jmp */
--
1.8.3.2
- [Qemu-devel] [PATCH v4 00/21] target-arm: Preparations for A64 EL2 and 3, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 01/21] target-arm: Make elr_el1 an array, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 02/21] target-arm: Make esr_el1 an array, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 03/21] target-arm: c12_vbar -> vbar_el[], Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 04/21] target-arm: Move get_mem_index to translate.h, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 05/21] target-arm: A32: Use get_mem_index for load/stores, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 06/21] target-arm: Use a 1:1 mapping between EL and MMU index,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v4 07/21] target-arm: A64: Add SP entries for EL2 and 3, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 08/21] target-arm: A64: Add ELR entries for EL2 and 3, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 09/21] target-arm: Add SPSR entries for EL2/HYP and EL3/MON, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 10/21] target-arm: A64: Introduce aarch64_banked_spsr_index(), Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 12/21] target-arm: Add a feature flag for EL3, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 13/21] target-arm: Register EL2 versions of ELR and SPSR, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 11/21] target-arm: Add a feature flag for EL2, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 14/21] target-arm: Register EL3 versions of ELR and SPSR, Edgar E. Iglesias, 2014/05/22
- [Qemu-devel] [PATCH v4 15/21] target-arm: A64: Forbid ERET to higher or unimplemented ELs, Edgar E. Iglesias, 2014/05/22