On 2 May 2014 15:33, Paolo Bonzini <address@hidden> wrote:
On the x86, some devices need access to the CPU reset pin (INIT#).
Provide a generic service to do this, using one of the internal
cpu_interrupt targets. Generalize the PPC-specific code for
CPU_INTERRUPT_RESET to other targets.
Since PPC does not support migration across QEMU versions (its
machine types are not versioned yet), I picked the value that
is used on x86, CPU_INTERRUPT_TGT_INT_1. Consequently, TGT_INT_2
and TGT_INT_3 are shifted down by one while keeping their value.
Reviewed-by: Anthony Liguori <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
cpu-exec.c | 23 +++++++++++++----------
cpus.c | 9 +++++++++
include/exec/cpu-all.h | 8 +++++---
include/sysemu/cpus.h | 1 +
target-i386/cpu.h | 7 ++++---
target-ppc/cpu.h | 3 ---
6 files changed, 32 insertions(+), 19 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 2f54054..38e5f02 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -336,19 +336,25 @@ int cpu_exec(CPUArchState *env)
}
#endif
#if defined(TARGET_I386)
+ if (interrupt_request & CPU_INTERRUPT_INIT) {
+ cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
+ do_cpu_init(x86_cpu);
+ cpu->exception_index = EXCP_HALTED;
+ cpu_loop_exit(cpu);
+ }
+#else
+ if (interrupt_request & CPU_INTERRUPT_RESET) {
+ cpu_reset(cpu);
+ }
+#endif
I was looking at cleaning up the horrible ifdef ladder a little
lower in this function, and I noticed this code had been
added recently. Why is TARGET_I386 a special case here?