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[Qemu-devel] [PULL 01/24] tcg-mips: Layout executable and code_gen_buffe
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 01/24] tcg-mips: Layout executable and code_gen_buffer |
Date: |
Sat, 24 May 2014 08:53:38 -0700 |
Choosing good addresses for them means we can use JAL for helper calls.
Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
configure | 7 +++++--
translate-all.c | 13 +++++++++++++
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/configure b/configure
index 605a0ec..4d1e79d 100755
--- a/configure
+++ b/configure
@@ -4029,11 +4029,14 @@ fi
if test "$pie" = "no" ; then
textseg_addr=
case "$cpu" in
- arm | hppa | i386 | m68k | ppc | ppc64 | s390* | sparc | sparc64 | x86_64
| x32)
+ arm | i386 | ppc* | s390* | sparc* | x86_64 | x32)
+ # ??? Rationale for choosing this address
textseg_addr=0x60000000
;;
mips)
- textseg_addr=0x400000
+ # A 256M aligned address, high in the address space, with enough
+ # room for the code_gen_buffer above it before the stack.
+ textseg_addr=0x60000000
;;
esac
if [ -n "$textseg_addr" ]; then
diff --git a/translate-all.c b/translate-all.c
index 5549a85..c631694 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -475,6 +475,10 @@ static inline PageDesc *page_find(tb_page_addr_t index)
#elif defined(__s390x__)
/* We have a +- 4GB range on the branches; leave some slop. */
# define MAX_CODE_GEN_BUFFER_SIZE (3ul * 1024 * 1024 * 1024)
+#elif defined(__mips__)
+ /* We have a 256MB branch region, but leave room to make sure the
+ main executable is also within that region. */
+# define MAX_CODE_GEN_BUFFER_SIZE (128ul * 1024 * 1024)
#else
# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
#endif
@@ -545,6 +549,15 @@ static inline void *alloc_code_gen_buffer(void)
start = 0x40000000ul;
# elif defined(__s390x__)
start = 0x90000000ul;
+# elif defined(__mips__)
+ /* ??? We ought to more explicitly manage layout for softmmu too. */
+# ifdef CONFIG_USER_ONLY
+ start = 0x68000000ul;
+# elif _MIPS_SIM == _ABI64
+ start = 0x128000000ul;
+# else
+ start = 0x08000000ul;
+# endif
# endif
buf = mmap((void *)start, tcg_ctx.code_gen_buffer_size,
--
1.9.0
- [Qemu-devel] [PULL 00/24] tcg mips updates, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 01/24] tcg-mips: Layout executable and code_gen_buffer,
Richard Henderson <=
- [Qemu-devel] [PULL 03/24] tcg-mips: Use J and JAL opcodes, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 02/24] tcg-mips: Constrain the code_gen_buffer to be within one 256mb segment, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 04/24] tcg-mips: Fill the exit_tb delay slot, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 05/24] tcg-mips: Split large ldst offsets, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 06/24] tcg-mips: Move softmmu slow path out of line, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 07/24] tcg-mips: Convert to new qemu_l/st helpers, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 08/24] tcg-mips: Convert to new_ldst, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 09/24] tcg-mips: Rearrange register allocation, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 10/24] tcg-mips: Introduce TCG_TMP0, TCG_TMP1, Richard Henderson, 2014/05/24
- [Qemu-devel] [PULL 11/24] tcg-mips: Use T9 for TCG_TMP1, Richard Henderson, 2014/05/24