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[Qemu-devel] [PATCH v5 20/23] target-arm: A64: Generalize update_spsel f
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v5 20/23] target-arm: A64: Generalize update_spsel for the various ELs |
Date: |
Sun, 25 May 2014 11:08:49 +1000 |
From: "Edgar E. Iglesias" <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target-arm/internals.h | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/target-arm/internals.h b/target-arm/internals.h
index c9897c2..564b5fa 100644
--- a/target-arm/internals.h
+++ b/target-arm/internals.h
@@ -107,6 +107,7 @@ int arm_rmode_to_sf(int rmode);
static inline void update_spsel(CPUARMState *env, uint32_t imm)
{
+ unsigned int cur_el = arm_current_pl(env);
/* Update PSTATE SPSel bit; this requires us to update the
* working stack pointer in xregs[31].
*/
@@ -115,17 +116,17 @@ static inline void update_spsel(CPUARMState *env,
uint32_t imm)
}
env->pstate = deposit32(env->pstate, 0, 1, imm);
- /* EL0 has no access rights to update SPSel, and this code
- * assumes we are updating SP for EL1 while running as EL1.
+ /* We rely on illegal updates to SPsel from EL0 to get trapped
+ * at translation time.
*/
- assert(arm_current_pl(env) == 1);
+ assert(cur_el >= 1 && cur_el <= 3);
if (env->pstate & PSTATE_SP) {
/* Switch from using SP_EL0 to using SP_ELx */
env->sp_el[0] = env->xregs[31];
- env->xregs[31] = env->sp_el[1];
+ env->xregs[31] = env->sp_el[cur_el];
} else {
/* Switch from SP_EL0 to SP_ELx */
- env->sp_el[1] = env->xregs[31];
+ env->sp_el[cur_el] = env->xregs[31];
env->xregs[31] = env->sp_el[0];
}
}
--
1.8.3.2
- [Qemu-devel] [PATCH v5 10/23] target-arm: A64: Add ELR entries for EL2 and 3, (continued)
- [Qemu-devel] [PATCH v5 10/23] target-arm: A64: Add ELR entries for EL2 and 3, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 11/23] target-arm: Add SPSR entries for EL2/HYP and EL3/MON, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 12/23] target-arm: A64: Introduce aarch64_banked_spsr_index(), Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 13/23] target-arm: Add a feature flag for EL2, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 14/23] target-arm: Add a feature flag for EL3, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 15/23] target-arm: Register EL2 versions of ELR and SPSR, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 16/23] target-arm: Register EL3 versions of ELR and SPSR, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 17/23] target-arm: A64: Forbid ERET to higher or unimplemented ELs, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 18/23] target-arm: A64: Trap ERET from EL0 at translation time, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 19/23] target-arm: A64: Generalize ERET to various ELs, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 20/23] target-arm: A64: Generalize update_spsel for the various ELs,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v5 21/23] target-arm: Make vbar_write writeback to any CPREG, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 22/23] target-arm: A64: Register VBAR_EL2, Edgar E. Iglesias, 2014/05/24
- [Qemu-devel] [PATCH v5 23/23] target-arm: A64: Register VBAR_EL3, Edgar E. Iglesias, 2014/05/24