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[Qemu-devel] [PATCH v7 1/3] headers: Sync with Linux header


From: Gavin Shan
Subject: [Qemu-devel] [PATCH v7 1/3] headers: Sync with Linux header
Date: Tue, 27 May 2014 18:51:08 +1000

The patch synchronizes with linux header (vfio.h).

Signed-off-by: Gavin Shan <address@hidden>
---
 linux-headers/linux/vfio.h | 66 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h
index f0aa97d..4eda000 100644
--- a/linux-headers/linux/vfio.h
+++ b/linux-headers/linux/vfio.h
@@ -490,6 +490,72 @@ struct vfio_iommu_spapr_tce_reset {
 };
 #define VFIO_IOMMU_SPAPR_TCE_RESET     _IO(VFIO_TYPE, VFIO_BASE + 20)
 
+/*
+ * EEH functionality can be enabled or disabled on one specific device.
+ * Also, the DMA or IO frozen state can be removed from the frozen PE
+ * if required.
+ */
+struct vfio_eeh_pe_set_option {
+       __u32 argsz;
+       __u32 flags;
+       __u32 option;
+#define VFIO_EEH_PE_SET_OPT_DISABLE    0       /* Disable EEH  */
+#define VFIO_EEH_PE_SET_OPT_ENABLE     1       /* Enable EEH   */
+#define VFIO_EEH_PE_SET_OPT_IO         2       /* Enable IO    */
+#define VFIO_EEH_PE_SET_OPT_DMA                3       /* Enable DMA   */
+};
+
+#define VFIO_EEH_PE_SET_OPTION         _IO(VFIO_TYPE, VFIO_BASE + 21)
+
+/*
+ * Each EEH PE should have unique address to be identified. PE's
+ * sharing mode is also useful information as well.
+ */
+#define VFIO_EEH_PE_GET_ADDRESS                0       /* Get address  */
+#define VFIO_EEH_PE_GET_MODE           1       /* Query mode   */
+#define VFIO_EEH_PE_MODE_NONE          0       /* Not a PE     */
+#define VFIO_EEH_PE_MODE_NOT_SHARED    1       /* Exclusive    */
+#define VFIO_EEH_PE_MODE_SHARED                2       /* Shared mode  */
+
+/*
+ * EEH PE might have been frozen because of PCI errors. Also, it might
+ * be experiencing reset for error revoery. The following command helps
+ * to get the state.
+ */
+struct vfio_eeh_pe_get_state {
+       __u32 argsz;
+       __u32 flags;
+       __u32 state;
+};
+
+#define VFIO_EEH_PE_GET_STATE          _IO(VFIO_TYPE, VFIO_BASE + 22)
+
+/*
+ * Reset is the major step to recover problematic PE. The following
+ * command helps on that.
+ */
+struct vfio_eeh_pe_reset {
+       __u32 argsz;
+       __u32 flags;
+       __u32 option;
+#define VFIO_EEH_PE_RESET_DEACTIVATE   0       /* Deactivate reset     */
+#define VFIO_EEH_PE_RESET_HOT          1       /* Hot reset            */
+#define VFIO_EEH_PE_RESET_FUNDAMENTAL  3       /* Fundamental reset    */
+};
+
+#define VFIO_EEH_PE_RESET              _IO(VFIO_TYPE, VFIO_BASE + 23)
+
+/*
+ * One of the steps for recovery after PE reset is to configure the
+ * PCI bridges affected by the PE reset.
+ */
+struct vfio_eeh_pe_configure {
+       __u32 argsz;
+       __u32 flags;
+};
+
+#define VFIO_EEH_PE_CONFIGURE          _IO(VFIO_TYPE, VFIO_BASE + 24)
+
 /* ***************************************************************** */
 
 #endif /* VFIO_H */
-- 
1.8.3.2




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