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[Qemu-devel] [PATCH 0/3] ARM A32/T32: implement remaining crypto insns
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 0/3] ARM A32/T32: implement remaining crypto insns |
Date: |
Thu, 29 May 2014 19:05:21 +0100 |
This patchset implements the remaining A32/T32 instructions
in the ARM v8 Crypto Extensions: SHA1, SHA256 and VMULL.P64.
The bulk of this is Ard's SHA patch with a few fixups from me; the
VMULL.P64 patch is mine, based on the existing A64 implementation.
I hope to have time to fill in the A64 crypto instructions
before 2.1; we'll see.
thanks
-- PMM
Ard Biesheuvel (1):
target-arm: add support for v8 SHA1 and SHA256 instructions
Peter Maydell (2):
target-arm: Allow 3reg_wide undefreq to encode more bad size options
target-arm: add support for v8 VMULL.P64 instruction
linux-user/elfload.c | 3 +
target-arm/cpu.c | 3 +
target-arm/cpu.h | 3 +
target-arm/crypto_helper.c | 257 +++++++++++++++++++++++++++++++++++++++++++--
target-arm/helper-a64.c | 30 ------
target-arm/helper-a64.h | 2 -
target-arm/helper.h | 12 +++
target-arm/neon_helper.c | 30 ++++++
target-arm/translate.c | 132 ++++++++++++++++++++---
9 files changed, 421 insertions(+), 51 deletions(-)
--
1.9.2
- [Qemu-devel] [PATCH 0/3] ARM A32/T32: implement remaining crypto insns,
Peter Maydell <=