[Qemu-devel] [PATCH 0/9] target-arm: A64: Implement crypto insns

[Peter Maydell]

This patchseries (which sits on top of the v8 32-bit SHA patches
I sent out yesterday) implements all the instructions in the optional
CRC and crypto extensions. The first four patches do some
preliminary cleanup of various minor problems with the feature
bit setting; patch 5 is A64 CRC; patch 6 adds a minor streamlining
to the A32/T32 CRC helpers which I only thought of while writing
patch 5; patches 7-9 are simply A64 decode for the crypto insns
using the existing helper functions.

Git tree for these patches plus yesterday's:
 git://git.linaro.org/people/peter.maydell/qemu-arm.git crypto
web UI:
 
https://git.linaro.org/people/peter.maydell/qemu-arm.git/shortlog/refs/heads/crypto

thanks
-- PMM

Peter Maydell (9):
  target-arm: arm_any_initfn() should never set ARM_FEATURE_AARCH64
  target-arm: Remove unnecessary setting of feature bits
  target-arm: Clean up handling of ARMv8 optional feature bits
  target-arm: VFPv4 implies half-precision extension
  target-arm: A64: Implement CRC instructions
  target-arm: A32/T32: Mask CRC value in calling code, not helper
  target-arm: A64: Implement AES instructions
  target-arm: A64: Implement 3-register SHA instructions
  target-arm: A64: Implement two-register SHA instructions

 linux-user/elfload.c       |   4 +
 target-arm/cpu.c           |  16 ++--
 target-arm/cpu64.c         |  14 ++-
 target-arm/helper-a64.c    |  30 +++++++
 target-arm/helper-a64.h    |   2 +
 target-arm/helper.c        |  25 ++----
 target-arm/translate-a64.c | 209 ++++++++++++++++++++++++++++++++++++++++++++-
 target-arm/translate.c     |  10 +++
 8 files changed, 272 insertions(+), 38 deletions(-)

-- 
1.9.2