qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [RFC] qemu VGA endian swap low level drawing changes


From: Peter Maydell
Subject: Re: [Qemu-devel] [RFC] qemu VGA endian swap low level drawing changes
Date: Tue, 17 Jun 2014 11:19:09 +0100

On 17 June 2014 11:09, Benjamin Herrenschmidt <address@hidden> wrote:
> On Tue, 2014-06-17 at 12:00 +0200, Greg Kurz wrote:
>> There has been a discussion already about virtio endianness: relying on
>> a guest system wide setting such as LPCR_ILE has been strongly rejected
>> at the time... The consensus for virtio is "device endianness is the
>> endianness of the CPU that does the reset" (hence MSR_LE for PPC).
>
> How on earth did anybody reach such a conclusion ? Of all the possible
> options I can think of this is the one that makes the *less* sense !

Well, the right conclusion is "virtio should have specified
endianness sanely, ie to be independent of the CPU". However
we can't rewind time to make that decision correctly, so this
is the best we can usefully do without breaking existing
working guests.

It's absolutely a virtio-specific thing, though, given that
virtio has the weird "endianness of the guest" semantics in
it, so it's not a good model for anything else.

My personal opinion here is that device models should just
have a fixed byte order, and the guest should deal with it
(except in the cases where we're modelling real hardware
which has a real config register for flipping byte order,
in which case the answer is "work like that hardware").
So I'm still really dubious about adding endian swapping to
the VGA model at all. Why can't you just have the guest
do the right thing?

thanks
-- PMM



reply via email to

[Prev in Thread] Current Thread [Next in Thread]