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[Qemu-devel] [PULL 19/19] target-i386: Broadwell CPU model
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PULL 19/19] target-i386: Broadwell CPU model |
Date: |
Thu, 26 Jun 2014 00:12:19 +0200 |
From: Eduardo Habkost <address@hidden>
This adds a new CPU model named "Broadwell". It has all the features
from Haswell, plus PREFETCHW, RDSEED, ADX, SMAP.
PREFETCHW was already supported as "3dnowprefetch".
RDSEED, ADX was added on Linux v3.15-rc1.
SMAP was added on Linux v3.15-rc2.
Signed-off-by: Eduardo Habkost <address@hidden>
Cc: Wang, Yong Y <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Cc: Dugger, Donald D <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
---
target-i386/cpu.c | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 9c386b0..45c662d 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1042,6 +1042,40 @@ static X86CPUDefinition builtin_x86_defs[] = {
.model_id = "Intel Core Processor (Haswell)",
},
{
+ .name = "Broadwell",
+ .level = 0xd,
+ .vendor = CPUID_VENDOR_INTEL,
+ .family = 6,
+ .model = 61,
+ .stepping = 2,
+ .features[FEAT_1_EDX] =
+ CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
+ CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
+ CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
+ CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
+ CPUID_DE | CPUID_FP87,
+ .features[FEAT_1_ECX] =
+ CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
+ CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
+ CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
+ CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
+ CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
+ CPUID_EXT_PCID,
+ .features[FEAT_8000_0001_EDX] =
+ CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
+ CPUID_EXT2_SYSCALL,
+ .features[FEAT_8000_0001_ECX] =
+ CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
+ .features[FEAT_7_0_EBX] =
+ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
+ CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
+ CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
+ CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
+ CPUID_7_0_EBX_SMAP,
+ .xlevel = 0x8000000A,
+ .model_id = "Intel Core Processor (Broadwell)",
+ },
+ {
.name = "Opteron_G1",
.level = 5,
.vendor = CPUID_VENDOR_AMD,
--
1.8.4.5
- [Qemu-devel] [PULL 09/19] target-i386: Define TCG_*_FEATURES earlier in cpu.c, (continued)
- [Qemu-devel] [PULL 09/19] target-i386: Define TCG_*_FEATURES earlier in cpu.c, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 05/19] target-i386: Isolate KVM-specific code on CPU feature filtering logic, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 10/19] target-i386: Loop-based copying and setting/unsetting of feature words, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 04/19] target-i386: Pass FeatureWord argument to report_unavailable_features(), Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 13/19] target-i386: Add "migratable" property to "host" CPU model, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 11/19] target-i386: Loop-based feature word filtering in TCG mode, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 08/19] target-i386: Filter KVM and 0xC0000001 features on TCG, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 16/19] target-i386: block migration and savevm if invariant tsc is exposed, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 14/19] target-i386: Set migratable=yes by default on "host" CPU mooel, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 17/19] target-i386: Support "invariant tsc" flag, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 19/19] target-i386: Broadwell CPU model,
Andreas Färber <=
- [Qemu-devel] [PULL 15/19] savevm: check vmsd for migratability status, Andreas Färber, 2014/06/25
- [Qemu-devel] [PULL 18/19] target-i386: Fix indentation of CPU model definitions, Andreas Färber, 2014/06/25
- Re: [Qemu-devel] [PULL 00/19] QOM CPUState patch queue 2014-06-26, Peter Maydell, 2014/06/26