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Re: [Qemu-devel] About AddressSpace in intel-iommu emulation


From: Le Tan
Subject: Re: [Qemu-devel] About AddressSpace in intel-iommu emulation
Date: Fri, 27 Jun 2014 10:08:14 +0800

2014-06-26 22:05 GMT+08:00 Paolo Bonzini <address@hidden>:
> Il 26/06/2014 16:01, Le Tan ha scritto:
>
>> Hi Paolo,
>> I am adding intel-iommu emulation to q35 for the GSoC project. I am
>> confused about AddressSpace and I believe that you can help me. :)
>> 1. For intel-iommu emulation, I have to read the translation
>> structures from guest memory, that is, the guest will prepare some
>> tables in memory and write the physical address of them to a register
>> of intel-iommu, and I need to access those structures. I use
>> dma_memory_read(&address_space_memory,...) to do this. Is that right?
>> I am not sure that whether accesses to address_space_memory will be
>> translated through IOMMU. I think the answer is not, because I see
>> that cpu_physical_memory_read() also use address_space_memory as
>> AddressSpace.
>
>
> Correct.
>
>
>> 2. In my opinion, I have to init a AddressSpace and link it with my
>> IOMMU MemoryRegion, then the bus uses this AddressSpace to translate
>> the accesses. Is that right? For q35, how can I register my IOMMU
>> MemoryRegion to the bus? I see that there is function
>> pci_setup_iommu() that links a AddressSpace to the bus to translate
>> accesses to PCI into system memory. Is that related? I think q35
>> should maintain a bus AddressSpace, but I can't find it.
>> What do you think?
>
>
> Right now, the q35 PCI host does not define an iommu_fn, so the default DMA
> address space is used by pci_device_iommu_address_space.  This is just
> address_space_memory.
>
> The iommu_fn is set with pci_setup_iommu.  Commit ae74bbe (apb: implement
> IOMMU translation for PCI host bridge, 2014-05-28) provides an example of
> how to prepare an IOMMU memory region, add it to an address space, and
> return that address space from an iommu_fn.

Hi Paolo,
I have added the address space to q35 and the translate function of
intel_iommu is called. :) However, I still have some questions here.
1. In struct IOMMUTLBEntry, I think the addr_mask field should be the
mask of the page offset, right? But I see different usages of this
field. In spapr_tce_translate_iommu(), the addr_mask field is assigned
with the mask of the page offset. However, in pbm_translate_iommu(),
in the passthrough case, the addr_mask field seems to be assigned the
mask of the page number. Is there any problem here?
2. For q35, how to identify origination of DMA requests? The VT-d
manual says we should use source-id(for PCI-Express devices, it is
requester identifier) to map devices to domains. What is the related
part in QEMU? Where can I get the source-id of a DMA request?

Thanks very much!

Le


> Thanks,
>
> Paolo
>
>
>> Thanks very much!
>>
>> Regards,
>> Le Tan
>>
>



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