[Qemu-devel] [RFC PATCH v6 14/14] rexec: allow to enable reverse execution.

[fred . konrad]

From: KONRAD Frederic <address@hidden>

This creates QEMU options for reverse execution.

Signed-off-by: KONRAD Frederic <address@hidden>
---
 cpus.c          | 15 +++++++++++++++
 qemu-options.hx |  6 +++++-
 vl.c            |  6 ++++++
 3 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/cpus.c b/cpus.c
index 740c6e5..ba5f8f5 100644
--- a/cpus.c
+++ b/cpus.c
@@ -498,6 +498,7 @@ static const VMStateDescription vmstate_timers = {
 void configure_icount(QemuOpts *opts, Error **errp)
 {
     const char *option;
+    bool enable_rexec;
 
     seqlock_init(&timers_state.vm_clock_seqlock, NULL);
     vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
@@ -513,12 +514,26 @@ void configure_icount(QemuOpts *opts, Error **errp)
 
     icount_warp_timer = timer_new_ns(QEMU_CLOCK_REALTIME,
                                           icount_warp_rt, NULL);
+
+    enable_rexec = qemu_opt_get_bool(opts, "rexec", false);
+
     if (strcmp(option, "auto") != 0) {
         icount_time_shift = strtol(option, NULL, 0);
         use_icount = 1;
+
+        if (enable_rexec) {
+            rexec_setup();
+        }
         return;
     }
 
+    /*
+     * We don't allow to run reverse execution with use_icount != 1.
+     */
+    if (enable_rexec) {
+        error_setg(errp, "Reverse execution requires icount in fixed mode.");
+    }
+
     use_icount = 2;
 
     /* 125MIPS seems a reasonable initial guess at the guest speed.
diff --git a/qemu-options.hx b/qemu-options.hx
index 143def4..ee1fdf4 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -3011,7 +3011,7 @@ re-inject them.
 ETEXI
 
 DEF("icount", HAS_ARG, QEMU_OPTION_icount, \
-    "-icount [shift=N|auto]\n" \
+    "-icount [shift=N|auto][,rexec=on|off]\n" \
     "                enable virtual instruction counter with 2^N clock ticks 
per\n" \
     "                instruction\n", QEMU_ARCH_ALL)
 STEXI
@@ -3026,6 +3026,10 @@ Note that while this option can give deterministic 
behavior, it does not
 provide cycle accurate emulation.  Modern CPUs contain superscalar out of
 order cores with complex cache hierarchies.  The number of instructions
 executed often has little or no correlation with actual performance.
+
address@hidden will enable reverse execution. A snapshot is taken regularly
+and will allow to replay the execution when gdb reverse-step or reverse-cont
+command are used. This requires shift!=auto.
 ETEXI
 
 DEF("watchdog", HAS_ARG, QEMU_OPTION_watchdog, \
diff --git a/vl.c b/vl.c
index 18df07c..69924cd 100644
--- a/vl.c
+++ b/vl.c
@@ -548,6 +548,9 @@ static QemuOptsList qemu_icount_opts = {
         {
             .name = "shift",
             .type = QEMU_OPT_STRING,
+        }, {
+            .name = "rexec",
+            .type = QEMU_OPT_BOOL,
         },
         { /* end of list */ }
     },
@@ -4561,5 +4564,8 @@ int main(int argc, char **argv, char **envp)
     tpm_cleanup();
 #endif
 
+    if (rexec_is_enabled()) {
+        rexec_cleanup();
+    }
     return 0;
 }
-- 
1.9.0