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Re: [Qemu-devel] [PATCH 0/3] arm_gic: Improve handling of GICD_ICFGR
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 0/3] arm_gic: Improve handling of GICD_ICFGR |
Date: |
Sun, 3 Aug 2014 14:21:05 +0100 |
On 3 August 2014 09:53, Adam Lackorzynski <address@hidden> wrote:
> Hi,
>
> the following three patches address the behavior of the GICD_ICFGR register
> in the ARM GIC.
>
> Adam Lackorzynski (3):
> arm_gic: Fix read of GICD_ICFGR
> arm_gic: SGIs for GICD_ICFGR are WI
> arm_gic: GICD_ICFGR: Do not force edge-triggered PPIs
>
> hw/intc/arm_gic.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
Christoffer, did you want to review these? (I'll have a look through
them too shortly.)
thanks
-- PMM
[Qemu-devel] [PATCH 2/3] arm_gic: GICD_ICFGR: Write model only for pre v1 GICs, Adam Lackorzynski, 2014/08/16