[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 1/8] target-ppc: Bug Fix: rlwinm
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 1/8] target-ppc: Bug Fix: rlwinm |
Date: |
Fri, 15 Aug 2014 08:34:12 -1000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.7.0 |
On 08/11/2014 09:23 AM, Tom Musta wrote:
> The rlwinm specification includes the ROTL32 operation, which is defined
> to be a left rotation of two copies of the least significant 32 bits of
> the source GPR.
>
> The current implementation is incorrect on 64-bit implementations in that
> it rotates a single copy of the least significant 32 bits, padding with
> zeroes in the most significant bits.
Yes, it does describe rotate_32 as a double-copy of the low 32 bits. But it
also describes the mask as having "0 bits elsewhere". Thus, post mask, I don't
see how you could distinguish the implementations.
Have you an example that doesn't work with the current code?
r~
- [Qemu-devel] [PATCH 0/8] target-ppc: Bug Fixes for 64 Bit FXU Instructions, Tom Musta, 2014/08/11
- [Qemu-devel] [PATCH 1/8] target-ppc: Bug Fix: rlwinm, Tom Musta, 2014/08/11
- Re: [Qemu-devel] [PATCH 1/8] target-ppc: Bug Fix: rlwinm,
Richard Henderson <=
- [Qemu-devel] [PATCH 2/8] target-ppc: Bug Fix: rlwnm, Tom Musta, 2014/08/11
- [Qemu-devel] [PATCH 3/8] target-ppc: Bug Fix: rlwimi, Tom Musta, 2014/08/11
- [Qemu-devel] [PATCH 4/8] target-ppc: Bug Fix: mullw, Tom Musta, 2014/08/11
- [Qemu-devel] [PATCH 5/8] target-ppc: Bug Fix: mullwo, Tom Musta, 2014/08/11