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Re: [Qemu-devel] [PATCH v4 3/8] intel-iommu: add DMAR table to ACPI tabl
From: |
Michael S. Tsirkin |
Subject: |
Re: [Qemu-devel] [PATCH v4 3/8] intel-iommu: add DMAR table to ACPI tables |
Date: |
Sun, 17 Aug 2014 13:07:28 +0200 |
On Sat, Aug 16, 2014 at 01:55:39PM +0800, Le Tan wrote:
> Expose Intel IOMMU to the BIOS. If object of TYPE_INTEL_IOMMU_DEVICE exists,
> add DMAR table to ACPI RSDT table. For now the DMAR table indicates that there
> is only one hardware unit without INTR_REMAP capability on the platform.
>
> Signed-off-by: Le Tan <address@hidden>
Andreas could you ack the QOM usage here pls?
> ---
> hw/i386/acpi-build.c | 39 +++++++++++++++++++++++++++++++++++++++
> hw/i386/acpi-defs.h | 40 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 79 insertions(+)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 816c6d9..ac56a63 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -47,6 +47,7 @@
> #include "hw/i386/ich9.h"
> #include "hw/pci/pci_bus.h"
> #include "hw/pci-host/q35.h"
> +#include "hw/i386/intel_iommu.h"
>
> #include "hw/i386/q35-acpi-dsdt.hex"
> #include "hw/i386/acpi-dsdt.hex"
> @@ -1350,6 +1351,30 @@ build_mcfg_q35(GArray *table_data, GArray *linker,
> AcpiMcfgInfo *info)
> }
>
> static void
> +build_dmar_q35(GArray *table_data, GArray *linker)
> +{
> + int dmar_start = table_data->len;
> +
> + AcpiTableDmar *dmar;
> + AcpiDmarHardwareUnit *drhd;
> +
> + dmar = acpi_data_push(table_data, sizeof(*dmar));
> + dmar->host_address_width = VTD_HOST_ADDRESS_WIDTH - 1;
> + dmar->flags = 0; /* No intr_remap for now */
> +
> + /* DMAR Remapping Hardware Unit Definition structure */
> + drhd = acpi_data_push(table_data, sizeof(*drhd));
> + drhd->type = cpu_to_le16(ACPI_DMAR_TYPE_HARDWARE_UNIT);
> + drhd->length = cpu_to_le16(sizeof(*drhd)); /* No device scope now */
> + drhd->flags = ACPI_DMAR_INCLUDE_PCI_ALL;
> + drhd->pci_segment = cpu_to_le16(0);
> + drhd->address = cpu_to_le64(Q35_HOST_BRIDGE_IOMMU_ADDR);
> +
> + build_header(linker, table_data, (void *)(table_data->data + dmar_start),
> + "DMAR", table_data->len - dmar_start, 1);
> +}
> +
> +static void
> build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc)
> {
> AcpiTableHeader *dsdt;
> @@ -1470,6 +1495,16 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg)
> return true;
> }
>
> +static bool acpi_has_iommu(void)
> +{
> + bool ambiguous;
> + Object *intel_iommu;
> +
> + intel_iommu = object_resolve_path_type("", TYPE_INTEL_IOMMU_DEVICE,
> + &ambiguous);
> + return intel_iommu && !ambiguous;
> +}
> +
> static
> void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
> {
> @@ -1539,6 +1574,10 @@ void acpi_build(PcGuestInfo *guest_info,
> AcpiBuildTables *tables)
> acpi_add_table(table_offsets, tables->table_data);
> build_mcfg_q35(tables->table_data, tables->linker, &mcfg);
> }
> + if (acpi_has_iommu()) {
> + acpi_add_table(table_offsets, tables->table_data);
> + build_dmar_q35(tables->table_data, tables->linker);
> + }
>
> /* Add tables supplied by user (if any) */
> for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
> diff --git a/hw/i386/acpi-defs.h b/hw/i386/acpi-defs.h
> index e93babb..93f424b 100644
> --- a/hw/i386/acpi-defs.h
> +++ b/hw/i386/acpi-defs.h
> @@ -314,4 +314,44 @@ struct AcpiTableMcfg {
> } QEMU_PACKED;
> typedef struct AcpiTableMcfg AcpiTableMcfg;
>
> +/* DMAR - DMA Remapping table r2.2 */
> +struct AcpiTableDmar {
> + ACPI_TABLE_HEADER_DEF
> + uint8_t host_address_width; /* Maximum DMA physical addressability */
> + uint8_t flags;
> + uint8_t reserved[10];
> +} QEMU_PACKED;
> +typedef struct AcpiTableDmar AcpiTableDmar;
> +
> +/* Masks for Flags field above */
> +#define ACPI_DMAR_INTR_REMAP 1
> +#define ACPI_DMAR_X2APIC_OPT_OUT (1 << 1)
> +
> +/* Values for sub-structure type for DMAR */
> +enum {
> + ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, /* DRHD */
> + ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, /* RMRR */
> + ACPI_DMAR_TYPE_ATSR = 2, /* ATSR */
> + ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, /* RHSR */
> + ACPI_DMAR_TYPE_ANDD = 4, /* ANDD */
> + ACPI_DMAR_TYPE_RESERVED = 5 /* Reserved for furture use */
> +};
> +
> +/*
> + * Sub-structures for DMAR
> + */
> +/* Type 0: Hardware Unit Definition */
> +struct AcpiDmarHardwareUnit {
> + uint16_t type;
> + uint16_t length;
> + uint8_t flags;
> + uint8_t reserved;
> + uint16_t pci_segment; /* The PCI Segment associated with this unit */
> + uint64_t address; /* Base address of remapping hardware register-set */
> +} QEMU_PACKED;
> +typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
> +
> +/* Masks for Flags field above */
> +#define ACPI_DMAR_INCLUDE_PCI_ALL 1
> +
> #endif
> --
> 1.9.1
- [Qemu-devel] [PATCH v4 0/8] intel-iommu: introduce Intel IOMMU (VT-d) emulation to q35 chipset, Le Tan, 2014/08/16
- [Qemu-devel] [PATCH v4 2/8] intel-iommu: introduce Intel IOMMU (VT-d) emulation, Le Tan, 2014/08/16
- [Qemu-devel] [PATCH v4 1/8] iommu: add is_write as a parameter to the translate function of MemoryRegionIOMMUOps, Le Tan, 2014/08/16
- [Qemu-devel] [PATCH v4 3/8] intel-iommu: add DMAR table to ACPI tables, Le Tan, 2014/08/16
- Re: [Qemu-devel] [PATCH v4 3/8] intel-iommu: add DMAR table to ACPI tables,
Michael S. Tsirkin <=
- [Qemu-devel] [PATCH v4 5/8] intel-iommu: fix coding style issues around in q35.c and machine.c, Le Tan, 2014/08/16
- [Qemu-devel] [PATCH v4 4/8] intel-iommu: add Intel IOMMU emulation to q35 and add a machine option "iommu" as a switch, Le Tan, 2014/08/16
- [Qemu-devel] [PATCH v4 6/8] intel-iommu: add supports for queued invalidation interface, Le Tan, 2014/08/16
- [Qemu-devel] [PATCH v4 7/8] intel-iommu: add context-cache to cache context-entry, Le Tan, 2014/08/16
- [Qemu-devel] [PATCH v4 8/8] intel-iommu: add IOTLB using hash table, Le Tan, 2014/08/16
- Re: [Qemu-devel] [PATCH v4 0/8] intel-iommu: introduce Intel IOMMU (VT-d) emulation to q35 chipset, Michael S. Tsirkin, 2014/08/17
- Re: [Qemu-devel] [PATCH v4 0/8] intel-iommu: introduce Intel IOMMU (VT-d) emulation to q35 chipset, Michael S. Tsirkin, 2014/08/24
- Re: [Qemu-devel] [PATCH v4 0/8] intel-iommu: introduce Intel IOMMU (VT-d) emulation to q35 chipset, Michael S. Tsirkin, 2014/08/28