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[Qemu-devel] [PATCH 2/2] pci: add check for pcie root ports and downstre
From: |
arei.gonglei |
Subject: |
[Qemu-devel] [PATCH 2/2] pci: add check for pcie root ports and downstream ports |
Date: |
Tue, 19 Aug 2014 21:08:27 +0800 |
From: Gonglei <address@hidden>
Right now, ARI Forwarding dose not support in QEMU.
According to PCIe spec section 7.3.1, only slot 0 with
the device attached to logic bus representing the link from
downstream ports and root ports.
So, adding check about slot 0 for PCIe downstream ports and
root ports, which avoid useless operation, both hotplug and
coldplug.
Signed-off-by: Gonglei <address@hidden>
---
hw/pci/pci.c | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 351d320..f2d267f 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -773,6 +773,42 @@ static int pci_init_multifunction(PCIBus *bus, PCIDevice
*dev)
return 0;
}
+static int pci_check_pcie_port(PCIBus *bus, PCIDevice *dev)
+{
+ Object *obj = OBJECT(bus);
+
+ if (!strcmp(object_get_typename(obj), TYPE_PCIE_BUS)) {
+ DeviceState *parent = qbus_get_parent(BUS(obj));
+ const char *name = object_get_typename(OBJECT(parent));
+
+ /*
+ * Root ports and downstream ports of switches are the hot
+ * pluggable ports in a PCI Express hierarchy.
+ * PCI Express supports chip-to-chip interconnect, a PCIe link can
+ * only connect one pci device/Switch/EndPoint or PCI-bridge.
+ *
+ * 7.3. Configuration Transaction Rules (PCI Express specification 3.0)
+ * 7.3.1. Device Number
+ *
+ * Downstream Ports that do not have ARI Forwarding enabled must
+ * associate only Device 0 with the device attached to the Logical Bus
+ * representing the Link from the Port.
+ *
+ * Right now, ARI Forwarding dose not support. So, only slot 0 is
+ * supported, regardless of hotplug or coldplug.
+ */
+ if (!strcmp(name, "ioh3420") || !strcmp(name, "xio3130-downstream")) {
+ if (PCI_SLOT(dev->devfn) != 0) {
+ error_report("Unsupported PCI slot %d for %s ports, only "
+ "supported slot 0", PCI_SLOT(dev->devfn), name);
+ return -1;
+ }
+ }
+ }
+
+ return 0;
+}
+
static void pci_config_alloc(PCIDevice *pci_dev)
{
int config_size = pci_config_size(pci_dev);
@@ -871,6 +907,11 @@ static PCIDevice *do_pci_register_device(PCIDevice
*pci_dev, PCIBus *bus,
return NULL;
}
+ if (pci_check_pcie_port(bus, pci_dev)) {
+ do_pci_unregister_device(pci_dev);
+ return NULL;
+ }
+
if (!config_read)
config_read = pci_default_read_config;
if (!config_write)
--
1.7.12.4
Re: [Qemu-devel] [PATCH 0/2] add check for PCIe root ports and downstream ports, Michael S. Tsirkin, 2014/08/19