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[Qemu-devel] [PULL 19/19] arm: stellaris: Remove misleading address_spac
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 19/19] arm: stellaris: Remove misleading address_space_mem var |
Date: |
Tue, 19 Aug 2014 19:09:44 +0100 |
From: Peter Crosthwaite <address@hidden>
It's a MemoryRegion and not an AddressSpace. But since it's single use,
just inline the get_system_memory() call to the only usage to remove it.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/stellaris.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 80028e8..64bd4b4 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1208,7 +1208,6 @@ static void stellaris_init(const char *kernel_filename,
const char *cpu_model,
0x40024000, 0x40025000, 0x40026000};
static const int gpio_irq[7] = {0, 1, 2, 3, 4, 30, 31};
- MemoryRegion *address_space_mem = get_system_memory();
qemu_irq *pic;
DeviceState *gpio_dev[7];
qemu_irq gpio_in[7][8];
@@ -1223,7 +1222,7 @@ static void stellaris_init(const char *kernel_filename,
const char *cpu_model,
flash_size = ((board->dc0 & 0xffff) + 1) << 1;
sram_size = (board->dc0 >> 18) + 1;
- pic = armv7m_init(address_space_mem,
+ pic = armv7m_init(get_system_memory(),
flash_size, sram_size, kernel_filename, cpu_model);
if (board->dc1 & (1 << 16)) {
--
1.9.1
- [Qemu-devel] [PULL 13/19] target-arm: Rename QEMU PSCI v0.1 definitions, (continued)
- [Qemu-devel] [PULL 13/19] target-arm: Rename QEMU PSCI v0.1 definitions, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 12/19] target-arm: Implement MDSCR_EL1 as having state, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 11/19] target-arm: Implement ARMv8 single-stepping for AArch32 code, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 10/19] target-arm: Implement ARMv8 single-step handling for A64 code, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 14/19] arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 16/19] loader: Add load_image_gzipped function., Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 09/19] target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tb, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 08/19] target-arm: Set PSTATE.SS correctly on exception return from AArch64, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 06/19] target-arm: Don't allow AArch32 to access RES0 CPSR bits, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 04/19] target-arm: Provide both 32 and 64 bit versions of debug registers, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 19/19] arm: stellaris: Remove misleading address_space_mem var,
Peter Maydell <=
- [Qemu-devel] [PULL 07/19] target-arm: Correctly handle PSTATE.SS when taking exception to AArch32, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 05/19] target-arm: Adjust debug ID registers per-CPU, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 01/19] target-arm: Fix return address for A64 BRK instructions, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 02/19] target-arm: Collect up the debug cp register definitions, Peter Maydell, 2014/08/19
- [Qemu-devel] [PULL 03/19] target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14, Peter Maydell, 2014/08/19
- Re: [Qemu-devel] [PULL 00/19] target-arm queue, Peter Maydell, 2014/08/20