[Qemu-devel] [Bug 1359930] Re: [ARMv5] Integrator/CP regression when reading FPSID register

[Jakub Jermar]

** Summary changed:

- [ARMv5] Integrator/CP regression when reading FPSID instruction
+ [ARMv5] Integrator/CP regression when reading FPSID register

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https://bugs.launchpad.net/bugs/1359930

Title:
  [ARMv5] Integrator/CP regression when reading FPSID register

Status in Home for various HelenOS development branches:
  New
Status in QEMU:
  New

Bug description:
  There seems to be a regression in QEMU 2.1.0 which demonstrates itself
  when running the attached HelenOS Integrator/CP (i.e. ARMv5) image. The
  offending instruction seems to be:

    vmrs r0, fpsid

  Upon its execution, HelenOS kernel receives an Undefined instruction
  exception (which it does not anticipate at that point) and crashes.

  QEMU 2.0.0 was not affected by this issue.

  Command line to reproduce with QEMU 2.1.0:

  $ qemu-system-arm -M integratorcp -kernel image.boot -s -S &
  $ /usr/local/cross/arm32/bin/arm-linux-gnueabi-gdb 
  ...
  (gdb) target remote localhost:1234
  Remote debugging using localhost:1234
  warning: Can not parse XML target description; XML support was disabled at 
compile time
  0x00000000 in ?? ()
  (gdb) symbol-file kernel/kernel.raw
  Reading symbols from 
/home/jermar/software/HelenOS.mainline/kernel/kernel.raw...done.
  (gdb) break ras_check
  Breakpoint 1 at 0x80a021bc: file arch/arm32/src/ras.c, line 67.
  (gdb) c
  Continuing.

  Breakpoint 1, ras_check (n=1, istate=0x813e7f70) at arch/arm32/src/ras.c:67
  67    {
  (gdb) set radix 16
  Input and output radices now set to decimal 16, hex 10, octal 20.
  (gdb) print istate->pc
  $1 = 0x80a02458
  (gdb) disassemble 0x80a02458
  Dump of assembler code for function fpsid_read:
     0x80a02454 <+0>:   vmrs    r0, fpsid                           <======= 
UNDEFINED EXCEPTION INSTRUCTION
     0x80a02458 <+4>:   mov     pc, lr
  End of assembler dump.

  
  The Undefined instruction exception is not expected at this point when 
executing the VMRS r0,fpsid instruction.

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