Re: [Qemu-devel] [PATCH v7 00/15] TriCore architecture guest implementation

[Peter Maydell]

On 1 September 2014 12:59, Bastian Koppelmann
<address@hidden> wrote:
> Hi,
>
> my aim is to add Infineon's TriCore architecture to QEMU. This series of 
> patches adds the target stubs, a basic testboard and a softmmu for system 
> mode emulation. Furthermore it adds all the 16 bit long instructions of the 
> architecture grouped by opcode format.
>
> After this series of patches. Another one will follow, which adds a lot of 
> the 32 bit long instructions.
>
> All the best
>
> Bastian
>
> v6 -> v7:
>     - TRICORECPU -> TriCoreCPU.
>     - TRICORECPUClass -> TriCoreCPUClass.
>     - CPUTRICOREState -> CPUTriCoreState.
>     - TRICORECPUInfo: Add terminator.
>     - TRICORECPUInfo -> TriCoreCPUInfo.
>     - Remove ARM-style IRQ and FIQ lines.
>     - CPUTRICOREState: target_ulong -> uint32_t.
>     - CPUTRICOREState: Move mask defines below the struct.
>     - tricore_testboard.c: Change Licence to GPL v2.
>     - fprintf(stderr, ..) -> error_report(..).
>     - tricore_boot_info: Remove unused fields.
>     - tricore_testboard.c: Remove flash drive.
>     - tricore_testboard.c: Is not default anymore, change desc.
>     - configure: Remove empty disas case. Remove target_phys_bits=32.
>     - tricore-softmmu.mak: Remove pci, SMC91C111 and PFLASH_CFI01.
>
>
> Bastian Koppelmann (15):
>   target-tricore: Add target stubs and qom-cpu
>   target-tricore: Add board for systemmode
>   target-tricore: Add softmmu support
>   target-tricore: Add initialization for translation and activate target
>   target-tricore: Add masks and opcodes for decoding
>   target-tricore: Add instructions of SRC opcode format
>   target-tricore: Add instructions of SRR opcode format
>   target-tricore: Add instructions of SSR opcode format
>   target-tricore: Add instructions of SRRS and SLRO opcode format
>   target-tricore: Add instructions of SB opcode format
>   target-tricore: Add instructions of SBC and SBRN opcode format
>   target-tricore: Add instructions of SBR opcode format
>   target-tricore: Add instructions of SC opcode format
>   target-tricore: Add instructions of SLR, SSRO and SRO opcode format
>   target-tricore: Add instructions of SR opcode format

Thanks; applied all to master.

-- PMM