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[Qemu-devel] [PULL v2 03/16] intel-iommu: add DMAR table to ACPI tables
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL v2 03/16] intel-iommu: add DMAR table to ACPI tables |
Date: |
Wed, 3 Sep 2014 16:44:58 +0300 |
From: Le Tan <address@hidden>
Expose Intel IOMMU to the BIOS. If object of TYPE_INTEL_IOMMU_DEVICE exists,
add DMAR table to ACPI RSDT table. For now the DMAR table indicates that there
is only one hardware unit without INTR_REMAP capability on the platform.
Signed-off-by: Le Tan <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/i386/acpi-defs.h | 40 ++++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 39 +++++++++++++++++++++++++++++++++++++++
2 files changed, 79 insertions(+)
diff --git a/hw/i386/acpi-defs.h b/hw/i386/acpi-defs.h
index 1bc974a..c4468f8 100644
--- a/hw/i386/acpi-defs.h
+++ b/hw/i386/acpi-defs.h
@@ -325,4 +325,44 @@ struct Acpi20Tcpa {
} QEMU_PACKED;
typedef struct Acpi20Tcpa Acpi20Tcpa;
+/* DMAR - DMA Remapping table r2.2 */
+struct AcpiTableDmar {
+ ACPI_TABLE_HEADER_DEF
+ uint8_t host_address_width; /* Maximum DMA physical addressability */
+ uint8_t flags;
+ uint8_t reserved[10];
+} QEMU_PACKED;
+typedef struct AcpiTableDmar AcpiTableDmar;
+
+/* Masks for Flags field above */
+#define ACPI_DMAR_INTR_REMAP 1
+#define ACPI_DMAR_X2APIC_OPT_OUT (1 << 1)
+
+/* Values for sub-structure type for DMAR */
+enum {
+ ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, /* DRHD */
+ ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, /* RMRR */
+ ACPI_DMAR_TYPE_ATSR = 2, /* ATSR */
+ ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, /* RHSR */
+ ACPI_DMAR_TYPE_ANDD = 4, /* ANDD */
+ ACPI_DMAR_TYPE_RESERVED = 5 /* Reserved for furture use */
+};
+
+/*
+ * Sub-structures for DMAR
+ */
+/* Type 0: Hardware Unit Definition */
+struct AcpiDmarHardwareUnit {
+ uint16_t type;
+ uint16_t length;
+ uint8_t flags;
+ uint8_t reserved;
+ uint16_t pci_segment; /* The PCI Segment associated with this unit */
+ uint64_t address; /* Base address of remapping hardware register-set */
+} QEMU_PACKED;
+typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
+
+/* Masks for Flags field above */
+#define ACPI_DMAR_INCLUDE_PCI_ALL 1
+
#endif
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 85e5834..3e7fba3 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -49,6 +49,7 @@
#include "hw/i386/ich9.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci-host/q35.h"
+#include "hw/i386/intel_iommu.h"
#include "hw/i386/q35-acpi-dsdt.hex"
#include "hw/i386/acpi-dsdt.hex"
@@ -1388,6 +1389,30 @@ build_mcfg_q35(GArray *table_data, GArray *linker,
AcpiMcfgInfo *info)
}
static void
+build_dmar_q35(GArray *table_data, GArray *linker)
+{
+ int dmar_start = table_data->len;
+
+ AcpiTableDmar *dmar;
+ AcpiDmarHardwareUnit *drhd;
+
+ dmar = acpi_data_push(table_data, sizeof(*dmar));
+ dmar->host_address_width = VTD_HOST_ADDRESS_WIDTH - 1;
+ dmar->flags = 0; /* No intr_remap for now */
+
+ /* DMAR Remapping Hardware Unit Definition structure */
+ drhd = acpi_data_push(table_data, sizeof(*drhd));
+ drhd->type = cpu_to_le16(ACPI_DMAR_TYPE_HARDWARE_UNIT);
+ drhd->length = cpu_to_le16(sizeof(*drhd)); /* No device scope now */
+ drhd->flags = ACPI_DMAR_INCLUDE_PCI_ALL;
+ drhd->pci_segment = cpu_to_le16(0);
+ drhd->address = cpu_to_le64(Q35_HOST_BRIDGE_IOMMU_ADDR);
+
+ build_header(linker, table_data, (void *)(table_data->data + dmar_start),
+ "DMAR", table_data->len - dmar_start, 1);
+}
+
+static void
build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc)
{
AcpiTableHeader *dsdt;
@@ -1508,6 +1533,16 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg)
return true;
}
+static bool acpi_has_iommu(void)
+{
+ bool ambiguous;
+ Object *intel_iommu;
+
+ intel_iommu = object_resolve_path_type("", TYPE_INTEL_IOMMU_DEVICE,
+ &ambiguous);
+ return intel_iommu && !ambiguous;
+}
+
static
void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
{
@@ -1584,6 +1619,10 @@ void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables
*tables)
acpi_add_table(table_offsets, tables->table_data);
build_mcfg_q35(tables->table_data, tables->linker, &mcfg);
}
+ if (acpi_has_iommu()) {
+ acpi_add_table(table_offsets, tables->table_data);
+ build_dmar_q35(tables->table_data, tables->linker);
+ }
/* Add tables supplied by user (if any) */
for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
--
MST
- [Qemu-devel] [PULL v2 00/16] pci, pc fixes, features, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 02/16] intel-iommu: introduce Intel IOMMU (VT-d) emulation, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 03/16] intel-iommu: add DMAR table to ACPI tables,
Michael S. Tsirkin <=
- [Qemu-devel] [PULL v2 01/16] iommu: add is_write as a parameter to the translate function of MemoryRegionIOMMUOps, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 06/16] intel-iommu: add supports for queued invalidation interface, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 04/16] intel-iommu: add Intel IOMMU emulation to q35 and add a machine option "iommu" as a switch, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 07/16] intel-iommu: add context-cache to cache context-entry, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 05/16] intel-iommu: fix coding style issues around in q35.c and machine.c, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 09/16] vhost_net: cleanup start/stop condition, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 08/16] intel-iommu: add IOTLB using hash table, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 12/16] pci: avoid losing config updates to MSI/MSIX cap regs, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 10/16] ioh3420: remove unused ioh3420_init() declaration, Michael S. Tsirkin, 2014/09/03
- [Qemu-devel] [PULL v2 14/16] vhost_net: init acked_features to backend_features, Michael S. Tsirkin, 2014/09/03