[Qemu-devel] [PATCH v3 0/3] target-i386: x87 exception pointers using TCG.

[Jaume Marti Farriol]

Hello,

I submit a patch to fix bugs 661696 and 1248376.  This is the third version of 
this patch.
As mentioned in a previous email, the patch implements, for TCG, the 
specifications provided in Intel and AMD programmer's manuals regarding the x87 
exception pointers. That is, when executing instructions fstenv/fnstenv, fsave 
and fxsave the values for the instruction pointer, data pointer and opcode of 
the last non-control x87 instruction executed, are correctly saved to the 
specified memory address. When executing instructions fldenv, frstor and 
fxrstor the values that are going to be considered the instruction pointer, 
data pointer and opcode of the last non-control x87 instruction are obtained 
from the specified memory address.

Best regards,
Jaume


 linux-user/signal.c      |   4 +-
 target-i386/cpu.h        |  27 ++-
 target-i386/fpu_helper.c | 223 ++++++++++++++++++------
 target-i386/machine.c    |   2 +-
 target-i386/translate.c  | 436 +++++++++++++++++++++++++++++++++--------------
 tests/tcg/test-i386.c    |  71 +++++++-
 6 files changed, 571 insertions(+), 192 deletions(-)

-- 
2.1.0