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Re: [Qemu-devel] [PATCH v3 0/3] add check for PCIe root ports and downst


From: Gonglei (Arei)
Subject: Re: [Qemu-devel] [PATCH v3 0/3] add check for PCIe root ports and downstream ports
Date: Wed, 10 Sep 2014 01:40:26 +0000

> -----Original Message-----
> From: Gonglei (Arei)
> Sent: Thursday, September 04, 2014 8:10 PM
> Subject: RE: [PATCH v3 0/3] add check for PCIe root ports and downstream
> ports
> 
> Ping... Michael? Thanks!
> 

Ping... again. Thanks!

> 
> Best regards,
> -Gonglei
> 
> 
> > -----Original Message-----
> > From: Gonglei (Arei)
> > Sent: Monday, September 01, 2014 9:29 PM
> > To: address@hidden
> > Cc: address@hidden; Huangweidong (C); address@hidden;
> > address@hidden; address@hidden; address@hidden;
> > Huangpeng (Peter); address@hidden; address@hidden;
> Luonengjun;
> > Gonglei (Arei)
> > Subject: [PATCH v3 0/3] add check for PCIe root ports and downstream ports
> > Importance: High
> >
> > From: Gonglei <address@hidden>
> >
> > Root ports and downstream ports of switches are the hot
> > pluggable ports in a PCI Express hierarchy.
> > PCI Express supports chip-to-chip interconnect, a PCIe link can
> > only connect one pci device/Switch/EndPoint or PCI-bridge.
> >
> > 7.3. Configuration Transaction Rules (PCI Express specification 3.0)
> > 7.3.1. Device Number
> >
> > Downstream Ports that do not have ARI Forwarding enabled must
> > associate only Device 0 with the device attached to the Logical Bus
> > representing the Link from the Port.
> >
> > In QEMU, ARI Forwarding is enabled defualt at emulation of PCIe
> > ports. ARI Forwarding enable setting at firmware/OS Control handoff.
> > If the bit is Set when a non-ARI Device is present, the non-ARI
> > Device can respond to Configuration Space accesses under what it
> > interprets as being different Device Numbers, and its Functions can
> > be aliased under multiple Device Numbers, generally leading to
> > undesired behavior.
> >
> > So, for pci devices attached in pcie root ports or downstream pots,
> > we shoud assure that its slot is non-zero. For pcie devcies, which
> > ARP capbility is not enabled, we also should assure that its slot
> > is non-zero.
> >
> > Changes since v2:
> >  - make patch 1/3 more simpler and safer.(Hu Tao)
> >  - change check logic from pci.c to pcie.c and change function's name
> >  - judge devcies' ARI capbility instead of PCIe ports' ARI Forwarding
> >    (Michael)
> >  - add trivial patch 3/3
> >  - update patch's commit messages and code comments.
> >
> > Thanks for your reviewing.
> >
> > Changes since v1:
> >  - using object_dynamic_cast() instead of simple string comparing (Paolo)
> >  - add ARI Forwarding enable bit check
> >  - using pcie_cap_get_type() instead of simple string comparing (Marcel)
> >  - fix some other comments.
> >
> > Gonglei (3):
> >   qdev: Introduce a function to get qbus's parent
> >   pcie: add check for ari capability of pcie devices
> >   pcie: remove confused comments
> >
> >  hw/core/qdev.c         |  9 ++++++++
> >  hw/pci/pci.c           |  4 ++++
> >  hw/pci/pcie.c          | 59
> > +++++++++++++++++++++++++++++++++++++++++++-------
> >  include/hw/pci/pcie.h  |  1 +
> >  include/hw/qdev-core.h |  1 +
> >  5 files changed, 66 insertions(+), 8 deletions(-)
> >
> > --
> > 1.7.12.4
> >




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